ucPostDiv 1023 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c dividers->post_div = args.v3.ucPostDiv; ucPostDiv 1043 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c dividers->post_div = args.v5.ucPostDiv; ucPostDiv 1061 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c dividers->post_divider = dividers->post_div = args.v4.ucPostDiv; ucPostDiv 1078 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c dividers->post_divider = args.v6_out.ulClock.ucPostDiv; ucPostDiv 1115 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c mpll_param->post_div = args.ucPostDiv; ucPostDiv 439 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c if (args.v3.sOutput.ucPostDiv) { ucPostDiv 442 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_crtc->pll_post_div = args.v3.sOutput.ucPostDiv; ucPostDiv 612 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.ucPostDiv = post_div; ucPostDiv 622 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.ucPostDiv = post_div; ucPostDiv 632 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v3.ucPostDiv = post_div; ucPostDiv 649 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v5.ucPostDiv = post_div; ucPostDiv 679 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v6.ucPostDiv = post_div; ucPostDiv 962 drivers/gpu/drm/amd/display/dc/bios/command_table.c allocation.sPCLKInput.ucPostDiv = ucPostDiv 1033 drivers/gpu/drm/amd/display/dc/bios/command_table.c clk.sPCLKInput.ucPostDiv = ucPostDiv 1109 drivers/gpu/drm/amd/display/dc/bios/command_table.c clk.sPCLKInput.ucPostDiv = ucPostDiv 1521 drivers/gpu/drm/amd/display/dc/bios/command_table.c bp_params->pixel_clock_post_divider = params.sOutput.ucPostDiv; ucPostDiv 444 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; //return value ucPostDiv 452 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; //return post div to be written to register ucPostDiv 501 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; //Output Parameter ucPostDiv 517 drivers/gpu/drm/amd/include/atombios.h ULONG ucPostDiv:8; //return parameter: post divider which is used to program to register directly ucPostDiv 521 drivers/gpu/drm/amd/include/atombios.h ULONG ucPostDiv:8; //return parameter: post divider which is used to program to register directly ucPostDiv 534 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; //Output Parameter ucPostDiv 609 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; //Output ucPostDiv 1823 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; // post divider ucPostDiv 1843 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; // post divider ucPostDiv 1890 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; // post divider ucPostDiv 1919 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; // post divider. ucPostDiv 1967 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; // post divider. ucPostDiv 2157 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; // if it is none-zero, it is used to be calculated the other ppll parameter fb_divider ucPostDiv 7157 drivers/gpu/drm/amd/include/atombios.h UCHAR ucPostDiv; //Post div ucPostDiv 270 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c (uint32_t)mpll_parameters.ucPostDiv; ucPostDiv 313 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c (uint32_t)mpll_parameters.ulClock.ucPostDiv; ucPostDiv 342 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c mpll_param->ulPostDiv = mpll_parameters.ulClock.ucPostDiv; ucPostDiv 363 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c dividers->pll_post_divider = pll_parameters.ucPostDiv; ucPostDiv 380 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv = COMPUTE_GPUCLK_INPUT_FLAG_SCLK; ucPostDiv 388 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv; ucPostDiv 417 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv = COMPUTE_GPUCLK_INPUT_FLAG_SCLK; ucPostDiv 449 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv = ucPostDiv 458 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c pll_patameters.ulClock.ucPostDiv; ucPostDiv 414 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; //return value ucPostDiv 422 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; //return post div to be written to register ucPostDiv 467 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; //Output Parameter ucPostDiv 483 drivers/gpu/drm/radeon/atombios.h ULONG ucPostDiv:8; //return parameter: post divider which is used to program to register directly ucPostDiv 487 drivers/gpu/drm/radeon/atombios.h ULONG ucPostDiv:8; //return parameter: post divider which is used to program to register directly ucPostDiv 500 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; //Output Parameter ucPostDiv 547 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; //Output ucPostDiv 1548 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; // post divider ucPostDiv 1568 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; // post divider ucPostDiv 1615 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; // post divider ucPostDiv 1643 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; // post divider. ucPostDiv 1691 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; // post divider. ucPostDiv 1784 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; // if it is none-zero, it is used to be calculated the other ppll parameter fb_divider ucPostDiv 6008 drivers/gpu/drm/radeon/atombios.h UCHAR ucPostDiv; //Post div ucPostDiv 743 drivers/gpu/drm/radeon/atombios_crtc.c if (args.v3.sOutput.ucPostDiv) { ucPostDiv 746 drivers/gpu/drm/radeon/atombios_crtc.c radeon_crtc->pll_post_div = args.v3.sOutput.ucPostDiv; ucPostDiv 859 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucPostDiv = post_div; ucPostDiv 869 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucPostDiv = post_div; ucPostDiv 879 drivers/gpu/drm/radeon/atombios_crtc.c args.v3.ucPostDiv = post_div; ucPostDiv 896 drivers/gpu/drm/radeon/atombios_crtc.c args.v5.ucPostDiv = post_div; ucPostDiv 925 drivers/gpu/drm/radeon/atombios_crtc.c args.v6.ucPostDiv = post_div; ucPostDiv 2861 drivers/gpu/drm/radeon/radeon_atombios.c dividers->post_div = args.v1.ucPostDiv; ucPostDiv 2875 drivers/gpu/drm/radeon/radeon_atombios.c dividers->post_div = args.v2.ucPostDiv; ucPostDiv 2890 drivers/gpu/drm/radeon/radeon_atombios.c dividers->post_div = args.v3.ucPostDiv; ucPostDiv 2910 drivers/gpu/drm/radeon/radeon_atombios.c dividers->post_div = args.v5.ucPostDiv; ucPostDiv 2929 drivers/gpu/drm/radeon/radeon_atombios.c dividers->post_divider = dividers->post_div = args.v4.ucPostDiv; ucPostDiv 2946 drivers/gpu/drm/radeon/radeon_atombios.c dividers->post_divider = args.v6_out.ulClock.ucPostDiv; ucPostDiv 2983 drivers/gpu/drm/radeon/radeon_atombios.c mpll_param->post_div = args.ucPostDiv;