ucNumDPMLevels   2755 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) {
ucNumDPMLevels   2772 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
ucNumDPMLevels   7270 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) {
ucNumDPMLevels   7284 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
ucNumDPMLevels    469 drivers/gpu/drm/amd/include/pptable.h       UCHAR ucNumDPMLevels;
ucNumDPMLevels    788 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 			     size_of_entry_v2(pstate->ucNumDPMLevels));
ucNumDPMLevels    928 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		for (i = 0; i < pstate_entry_v2->ucNumDPMLevels; i++) {
ucNumDPMLevels   5600 drivers/gpu/drm/radeon/ci_dpm.c 		for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) {
ucNumDPMLevels   5614 drivers/gpu/drm/radeon/ci_dpm.c 		power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
ucNumDPMLevels   2687 drivers/gpu/drm/radeon/kv_dpm.c 		for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) {
ucNumDPMLevels   2704 drivers/gpu/drm/radeon/kv_dpm.c 		power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
ucNumDPMLevels    428 drivers/gpu/drm/radeon/pptable.h       UCHAR ucNumDPMLevels;
ucNumDPMLevels   2712 drivers/gpu/drm/radeon/radeon_atombios.c 			kcalloc(power_state->v2.ucNumDPMLevels ?
ucNumDPMLevels   2713 drivers/gpu/drm/radeon/radeon_atombios.c 				power_state->v2.ucNumDPMLevels : 1,
ucNumDPMLevels   2718 drivers/gpu/drm/radeon/radeon_atombios.c 		if (power_state->v2.ucNumDPMLevels) {
ucNumDPMLevels   2719 drivers/gpu/drm/radeon/radeon_atombios.c 			for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) {
ucNumDPMLevels   2742 drivers/gpu/drm/radeon/radeon_atombios.c 		power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
ucNumDPMLevels   6865 drivers/gpu/drm/radeon/si_dpm.c 		for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) {
ucNumDPMLevels   6879 drivers/gpu/drm/radeon/si_dpm.c 		power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
ucNumDPMLevels   1506 drivers/gpu/drm/radeon/sumo_dpm.c 		for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) {
ucNumDPMLevels   1522 drivers/gpu/drm/radeon/sumo_dpm.c 		power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
ucNumDPMLevels   1784 drivers/gpu/drm/radeon/trinity_dpm.c 		for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) {
ucNumDPMLevels   1801 drivers/gpu/drm/radeon/trinity_dpm.c 		power_state_offset += 2 + power_state->v2.ucNumDPMLevels;