CM_RGAM_CONTROL   107 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c 	REG_GET(CM_RGAM_CONTROL,
CM_RGAM_CONTROL   257 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c 	REG_SET(CM_RGAM_CONTROL, 0, CM_RGAM_LUT_MODE, re_mode);
CM_RGAM_CONTROL   172 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	SRI(CM_RGAM_CONTROL, CM, id), \
CM_RGAM_CONTROL  1167 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	uint32_t CM_RGAM_CONTROL; \