CM_OCSC_CONTROL   134 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	SRI(CM_OCSC_CONTROL, CM, id), \
CM_OCSC_CONTROL  1132 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	uint32_t CM_OCSC_CONTROL; \
CM_OCSC_CONTROL   255 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode);