uartbase           53 arch/mips/netlogic/common/earlycons.c 	uint64_t uartbase;
uartbase           56 arch/mips/netlogic/common/earlycons.c 	uartbase = nlm_get_uart_regbase(0, 0);
uartbase           58 arch/mips/netlogic/common/earlycons.c 	uartbase = nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET);
uartbase           60 arch/mips/netlogic/common/earlycons.c 	while ((nlm_read_reg(uartbase, UART_LSR) & UART_LSR_THRE) == 0)
uartbase           62 arch/mips/netlogic/common/earlycons.c 	nlm_write_reg(uartbase, UART_TX, c);
uartbase           28 arch/mips/netlogic/xlr/platform.c 	uint64_t uartbase;
uartbase           32 arch/mips/netlogic/xlr/platform.c 	uartbase = (uint64_t)(long)p->membase;
uartbase           33 arch/mips/netlogic/xlr/platform.c 	value = nlm_read_reg(uartbase, offset);
uartbase           46 arch/mips/netlogic/xlr/platform.c 	uint64_t uartbase;
uartbase           49 arch/mips/netlogic/xlr/platform.c 	uartbase = (uint64_t)(long)p->membase;
uartbase           57 arch/mips/netlogic/xlr/platform.c 	nlm_write_reg(uartbase, offset, value);
uartbase           89 arch/mips/netlogic/xlr/platform.c 	unsigned long uartbase;
uartbase           91 arch/mips/netlogic/xlr/platform.c 	uartbase = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET);
uartbase           92 arch/mips/netlogic/xlr/platform.c 	xlr_uart_data[0].membase = (void __iomem *)uartbase;
uartbase           93 arch/mips/netlogic/xlr/platform.c 	xlr_uart_data[0].mapbase = CPHYSADDR(uartbase);
uartbase           95 arch/mips/netlogic/xlr/platform.c 	uartbase = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_1_OFFSET);
uartbase           96 arch/mips/netlogic/xlr/platform.c 	xlr_uart_data[1].membase = (void __iomem *)uartbase;
uartbase           97 arch/mips/netlogic/xlr/platform.c 	xlr_uart_data[1].mapbase = CPHYSADDR(uartbase);
uartbase           23 arch/nios2/boot/compressed/console.c static void *uartbase;
uartbase           28 arch/nios2/boot/compressed/console.c 	if (readl(uartbase + ALTERA_JTAGUART_CONTROL_REG) &
uartbase           30 arch/nios2/boot/compressed/console.c 		writeb(ch, uartbase + ALTERA_JTAGUART_DATA_REG);
uartbase           35 arch/nios2/boot/compressed/console.c 	while ((readl(uartbase + ALTERA_JTAGUART_CONTROL_REG) &
uartbase           38 arch/nios2/boot/compressed/console.c 	writeb(ch, uartbase + ALTERA_JTAGUART_DATA_REG);
uartbase           50 arch/nios2/boot/compressed/console.c 	uartbase = my_ioremap((unsigned long) JTAG_UART_BASE);
uartbase           52 arch/nios2/boot/compressed/console.c 		uartbase + ALTERA_JTAGUART_CONTROL_REG);
uartbase           62 arch/nios2/boot/compressed/console.c static unsigned uartbase;
uartbase           69 arch/nios2/boot/compressed/console.c 		if (readw(uartbase + ALTERA_UART_STATUS_REG) &
uartbase           73 arch/nios2/boot/compressed/console.c 	writeb(ch, uartbase + ALTERA_UART_TXDATA_REG);
uartbase           88 arch/nios2/boot/compressed/console.c 	uartbase = (unsigned long) my_ioremap((unsigned long) UART0_BASE);
uartbase           91 arch/nios2/boot/compressed/console.c 	writew(baudclk, uartbase + ALTERA_UART_DIVISOR_REG);