txreadyq          139 arch/arm/mach-ixp4xx/fsg-setup.c 		.txreadyq	= 20,
txreadyq          143 arch/arm/mach-ixp4xx/fsg-setup.c 		.txreadyq	= 21,
txreadyq          279 arch/arm/mach-ixp4xx/goramo_mlr.c 		.txreadyq	= 32,
txreadyq          283 arch/arm/mach-ixp4xx/goramo_mlr.c 		.txreadyq	= 33,
txreadyq          306 arch/arm/mach-ixp4xx/goramo_mlr.c 		.txreadyq	= 34,
txreadyq          311 arch/arm/mach-ixp4xx/goramo_mlr.c 		.txreadyq	= 35,
txreadyq          103 arch/arm/mach-ixp4xx/include/mach/platform.h 	u8 txreadyq;
txreadyq          113 arch/arm/mach-ixp4xx/include/mach/platform.h 	u8 txreadyq;
txreadyq          194 arch/arm/mach-ixp4xx/ixdp425-setup.c 		.txreadyq	= 20,
txreadyq          198 arch/arm/mach-ixp4xx/ixdp425-setup.c 		.txreadyq	= 21,
txreadyq          172 arch/arm/mach-ixp4xx/nas100d-setup.c 		.txreadyq	= 20,
txreadyq          192 arch/arm/mach-ixp4xx/nslu2-setup.c 		.txreadyq	= 20,
txreadyq          177 arch/arm/mach-ixp4xx/omixp-setup.c 		.txreadyq	= 20,
txreadyq          181 arch/arm/mach-ixp4xx/omixp-setup.c 		.txreadyq	= 21,
txreadyq          131 arch/arm/mach-ixp4xx/vulcan-setup.c 		.txreadyq	= 20,
txreadyq          136 arch/arm/mach-ixp4xx/vulcan-setup.c 		.txreadyq	= 21,
txreadyq          812 drivers/net/ethernet/xscale/ixp4xx_eth.c 		start = qmgr_stat_below_low_watermark(port->plat->txreadyq);
txreadyq          813 drivers/net/ethernet/xscale/ixp4xx_eth.c 		queue_put_desc(port->plat->txreadyq, phys, desc);
txreadyq          827 drivers/net/ethernet/xscale/ixp4xx_eth.c 	unsigned int txreadyq = port->plat->txreadyq;
txreadyq          871 drivers/net/ethernet/xscale/ixp4xx_eth.c 	n = queue_get_desc(txreadyq, port, 1);
txreadyq          887 drivers/net/ethernet/xscale/ixp4xx_eth.c 	if (qmgr_stat_below_low_watermark(txreadyq)) { /* empty */
txreadyq          894 drivers/net/ethernet/xscale/ixp4xx_eth.c 		if (!qmgr_stat_below_low_watermark(txreadyq)) {
txreadyq         1048 drivers/net/ethernet/xscale/ixp4xx_eth.c 	err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0,
txreadyq         1063 drivers/net/ethernet/xscale/ixp4xx_eth.c 	qmgr_release_queue(port->plat->txreadyq);
txreadyq         1080 drivers/net/ethernet/xscale/ixp4xx_eth.c 	qmgr_release_queue(port->plat->txreadyq);
txreadyq         1242 drivers/net/ethernet/xscale/ixp4xx_eth.c 		queue_put_desc(port->plat->txreadyq,
txreadyq         1303 drivers/net/ethernet/xscale/ixp4xx_eth.c 			int n = queue_get_desc(port->plat->txreadyq, port, 1);
txreadyq         1328 drivers/net/ethernet/xscale/ixp4xx_eth.c 		while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0)
txreadyq          814 drivers/net/wan/ixp4xx_hss.c 		start = qmgr_stat_below_low_watermark(port->plat->txreadyq);
txreadyq          815 drivers/net/wan/ixp4xx_hss.c 		queue_put_desc(port->plat->txreadyq,
txreadyq          830 drivers/net/wan/ixp4xx_hss.c 	unsigned int txreadyq = port->plat->txreadyq;
txreadyq          876 drivers/net/wan/ixp4xx_hss.c 	n = queue_get_desc(txreadyq, port, 1);
txreadyq          891 drivers/net/wan/ixp4xx_hss.c 	if (qmgr_stat_below_low_watermark(txreadyq)) { /* empty */
txreadyq          897 drivers/net/wan/ixp4xx_hss.c 		if (!qmgr_stat_below_low_watermark(txreadyq)) {
txreadyq          932 drivers/net/wan/ixp4xx_hss.c 	err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0,
txreadyq          944 drivers/net/wan/ixp4xx_hss.c 	qmgr_release_queue(port->plat->txreadyq);
txreadyq          962 drivers/net/wan/ixp4xx_hss.c 	qmgr_release_queue(port->plat->txreadyq);
txreadyq         1070 drivers/net/wan/ixp4xx_hss.c 		queue_put_desc(port->plat->txreadyq,
txreadyq         1137 drivers/net/wan/ixp4xx_hss.c 		while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0)