tx_st             625 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h 		uint64_t tx_st:3;
tx_st             627 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h 		uint64_t tx_st:3;
tx_st             649 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h 		uint64_t tx_st:3;
tx_st             651 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h 		uint64_t tx_st:3;
tx_st             173 drivers/i2c/busses/i2c-qcom-geni.c 	u32 rx_st, tx_st;
tx_st             177 drivers/i2c/busses/i2c-qcom-geni.c 		tx_st = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT);
tx_st             180 drivers/i2c/busses/i2c-qcom-geni.c 		tx_st = readl_relaxed(gi2c->se.base + SE_GENI_TX_FIFO_STATUS);
tx_st             183 drivers/i2c/busses/i2c-qcom-geni.c 		dma, tx_st, rx_st, m_stat);
tx_st             214 sound/mips/hal2.h 	u32 tx_st[24];		/* Channel status data */