tx_lx_vmode_ctrl1   65 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	u32 tx_lx_vmode_ctrl1[HDMI_NUM_TX_CHANNEL];
tx_lx_vmode_ctrl1  331 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 		cfg->tx_lx_vmode_ctrl1[0] =
tx_lx_vmode_ctrl1  332 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 			cfg->tx_lx_vmode_ctrl1[1] =
tx_lx_vmode_ctrl1  333 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 			cfg->tx_lx_vmode_ctrl1[2] =
tx_lx_vmode_ctrl1  334 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 			cfg->tx_lx_vmode_ctrl1[3] = 0x00;
tx_lx_vmode_ctrl1  345 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 			cfg->tx_lx_vmode_ctrl1[i] = 0x00;
tx_lx_vmode_ctrl1  356 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 			cfg->tx_lx_vmode_ctrl1[i] = 0x00;
tx_lx_vmode_ctrl1  388 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 		DBG("tx_l%d_vmode_ctrl1 = 0x%x", i, cfg->tx_lx_vmode_ctrl1[i]);
tx_lx_vmode_ctrl1  510 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 				   cfg.tx_lx_vmode_ctrl1[i]);