tvenc 151 drivers/gpu/drm/zte/zx_tvenc.c struct zx_tvenc *tvenc = to_zx_tvenc(encoder); tvenc 163 drivers/gpu/drm/zte/zx_tvenc.c DRM_DEV_ERROR(tvenc->dev, "failed to find zmode\n"); tvenc 167 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_VIDEO_INFO, zmode->video_info); tvenc 168 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_VIDEO_RES, zmode->video_res); tvenc 169 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_FIELD1_PARAM, zmode->field1_param); tvenc 170 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_FIELD2_PARAM, zmode->field2_param); tvenc 171 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_LINE_O_1, zmode->burst_line_odd1); tvenc 172 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_LINE_E_1, zmode->burst_line_even1); tvenc 173 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_LINE_O_2, zmode->burst_line_odd2); tvenc 174 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_LINE_E_2, zmode->burst_line_even2); tvenc 175 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_LINE_TIMING_PARAM, tvenc 177 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_WEIGHT_VALUE, zmode->weight_value); tvenc 178 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_BLANK_BLACK_LEVEL, tvenc 180 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_BURST_LEVEL, zmode->burst_level); tvenc 181 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_CONTROL_PARAM, zmode->control_param); tvenc 182 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_SUB_CARRIER_PHASE1, tvenc 184 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_PHASE_LINE_INCR_CVBS, tvenc 190 drivers/gpu/drm/zte/zx_tvenc.c struct zx_tvenc *tvenc = to_zx_tvenc(encoder); tvenc 191 drivers/gpu/drm/zte/zx_tvenc.c struct zx_tvenc_pwrctrl *pwrctrl = &tvenc->pwrctrl; tvenc 199 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_ENABLE, 1); tvenc 204 drivers/gpu/drm/zte/zx_tvenc.c struct zx_tvenc *tvenc = to_zx_tvenc(encoder); tvenc 205 drivers/gpu/drm/zte/zx_tvenc.c struct zx_tvenc_pwrctrl *pwrctrl = &tvenc->pwrctrl; tvenc 207 drivers/gpu/drm/zte/zx_tvenc.c zx_writel(tvenc->mmio + VENC_ENABLE, 0); tvenc 227 drivers/gpu/drm/zte/zx_tvenc.c struct zx_tvenc *tvenc = to_zx_tvenc(connector); tvenc 228 drivers/gpu/drm/zte/zx_tvenc.c struct device *dev = tvenc->dev; tvenc 252 drivers/gpu/drm/zte/zx_tvenc.c struct zx_tvenc *tvenc = to_zx_tvenc(connector); tvenc 257 drivers/gpu/drm/zte/zx_tvenc.c DRM_DEV_ERROR(tvenc->dev, "unsupported mode: %s\n", mode->name); tvenc 277 drivers/gpu/drm/zte/zx_tvenc.c static int zx_tvenc_register(struct drm_device *drm, struct zx_tvenc *tvenc) tvenc 279 drivers/gpu/drm/zte/zx_tvenc.c struct drm_encoder *encoder = &tvenc->encoder; tvenc 280 drivers/gpu/drm/zte/zx_tvenc.c struct drm_connector *connector = &tvenc->connector; tvenc 303 drivers/gpu/drm/zte/zx_tvenc.c static int zx_tvenc_pwrctrl_init(struct zx_tvenc *tvenc) tvenc 305 drivers/gpu/drm/zte/zx_tvenc.c struct zx_tvenc_pwrctrl *pwrctrl = &tvenc->pwrctrl; tvenc 306 drivers/gpu/drm/zte/zx_tvenc.c struct device *dev = tvenc->dev; tvenc 336 drivers/gpu/drm/zte/zx_tvenc.c struct zx_tvenc *tvenc; tvenc 339 drivers/gpu/drm/zte/zx_tvenc.c tvenc = devm_kzalloc(dev, sizeof(*tvenc), GFP_KERNEL); tvenc 340 drivers/gpu/drm/zte/zx_tvenc.c if (!tvenc) tvenc 343 drivers/gpu/drm/zte/zx_tvenc.c tvenc->dev = dev; tvenc 344 drivers/gpu/drm/zte/zx_tvenc.c dev_set_drvdata(dev, tvenc); tvenc 347 drivers/gpu/drm/zte/zx_tvenc.c tvenc->mmio = devm_ioremap_resource(dev, res); tvenc 348 drivers/gpu/drm/zte/zx_tvenc.c if (IS_ERR(tvenc->mmio)) { tvenc 349 drivers/gpu/drm/zte/zx_tvenc.c ret = PTR_ERR(tvenc->mmio); tvenc 354 drivers/gpu/drm/zte/zx_tvenc.c ret = zx_tvenc_pwrctrl_init(tvenc); tvenc 360 drivers/gpu/drm/zte/zx_tvenc.c ret = zx_tvenc_register(drm, tvenc);