tve               132 drivers/gpu/drm/imx/imx-tve.c __acquires(&tve->lock)
tve               134 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = __tve;
tve               136 drivers/gpu/drm/imx/imx-tve.c 	spin_lock(&tve->lock);
tve               140 drivers/gpu/drm/imx/imx-tve.c __releases(&tve->lock)
tve               142 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = __tve;
tve               144 drivers/gpu/drm/imx/imx-tve.c 	spin_unlock(&tve->lock);
tve               147 drivers/gpu/drm/imx/imx-tve.c static void tve_enable(struct imx_tve *tve)
tve               149 drivers/gpu/drm/imx/imx-tve.c 	if (!tve->enabled) {
tve               150 drivers/gpu/drm/imx/imx-tve.c 		tve->enabled = true;
tve               151 drivers/gpu/drm/imx/imx-tve.c 		clk_prepare_enable(tve->clk);
tve               152 drivers/gpu/drm/imx/imx-tve.c 		regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
tve               157 drivers/gpu/drm/imx/imx-tve.c 	regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff);
tve               160 drivers/gpu/drm/imx/imx-tve.c 	if (tve->mode == TVE_MODE_VGA)
tve               161 drivers/gpu/drm/imx/imx-tve.c 		regmap_write(tve->regmap, TVE_INT_CONT_REG, 0);
tve               163 drivers/gpu/drm/imx/imx-tve.c 		regmap_write(tve->regmap, TVE_INT_CONT_REG,
tve               169 drivers/gpu/drm/imx/imx-tve.c static void tve_disable(struct imx_tve *tve)
tve               171 drivers/gpu/drm/imx/imx-tve.c 	if (tve->enabled) {
tve               172 drivers/gpu/drm/imx/imx-tve.c 		tve->enabled = false;
tve               173 drivers/gpu/drm/imx/imx-tve.c 		regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, 0);
tve               174 drivers/gpu/drm/imx/imx-tve.c 		clk_disable_unprepare(tve->clk);
tve               178 drivers/gpu/drm/imx/imx-tve.c static int tve_setup_tvout(struct imx_tve *tve)
tve               183 drivers/gpu/drm/imx/imx-tve.c static int tve_setup_vga(struct imx_tve *tve)
tve               190 drivers/gpu/drm/imx/imx-tve.c 	ret = regmap_update_bits(tve->regmap, TVE_TVDAC0_CONT_REG,
tve               195 drivers/gpu/drm/imx/imx-tve.c 	ret = regmap_update_bits(tve->regmap, TVE_TVDAC1_CONT_REG,
tve               200 drivers/gpu/drm/imx/imx-tve.c 	ret = regmap_update_bits(tve->regmap, TVE_TVDAC2_CONT_REG,
tve               212 drivers/gpu/drm/imx/imx-tve.c 	ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, mask, val);
tve               217 drivers/gpu/drm/imx/imx-tve.c 	return regmap_update_bits(tve->regmap, TVE_TST_MODE_REG,
tve               223 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = con_to_tve(connector);
tve               227 drivers/gpu/drm/imx/imx-tve.c 	if (!tve->ddc)
tve               230 drivers/gpu/drm/imx/imx-tve.c 	edid = drm_get_edid(connector, tve->ddc);
tve               243 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = con_to_tve(connector);
tve               247 drivers/gpu/drm/imx/imx-tve.c 	rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
tve               252 drivers/gpu/drm/imx/imx-tve.c 	rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
tve               256 drivers/gpu/drm/imx/imx-tve.c 	dev_warn(tve->dev, "ignoring mode %dx%d\n",
tve               265 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = con_to_tve(connector);
tve               267 drivers/gpu/drm/imx/imx-tve.c 	return &tve->encoder;
tve               274 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = enc_to_tve(encoder);
tve               286 drivers/gpu/drm/imx/imx-tve.c 	clk_set_rate(tve->clk, rate);
tve               287 drivers/gpu/drm/imx/imx-tve.c 	rounded_rate = clk_get_rate(tve->clk);
tve               290 drivers/gpu/drm/imx/imx-tve.c 	clk_set_rate(tve->di_clk, rounded_rate / div);
tve               292 drivers/gpu/drm/imx/imx-tve.c 	ret = clk_set_parent(tve->di_sel_clk, tve->di_clk);
tve               294 drivers/gpu/drm/imx/imx-tve.c 		dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n",
tve               298 drivers/gpu/drm/imx/imx-tve.c 	regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
tve               301 drivers/gpu/drm/imx/imx-tve.c 	if (tve->mode == TVE_MODE_VGA)
tve               302 drivers/gpu/drm/imx/imx-tve.c 		ret = tve_setup_vga(tve);
tve               304 drivers/gpu/drm/imx/imx-tve.c 		ret = tve_setup_tvout(tve);
tve               306 drivers/gpu/drm/imx/imx-tve.c 		dev_err(tve->dev, "failed to set configuration: %d\n", ret);
tve               311 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = enc_to_tve(encoder);
tve               313 drivers/gpu/drm/imx/imx-tve.c 	tve_enable(tve);
tve               318 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = enc_to_tve(encoder);
tve               320 drivers/gpu/drm/imx/imx-tve.c 	tve_disable(tve);
tve               328 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = enc_to_tve(encoder);
tve               331 drivers/gpu/drm/imx/imx-tve.c 	imx_crtc_state->di_hsync_pin = tve->di_hsync_pin;
tve               332 drivers/gpu/drm/imx/imx-tve.c 	imx_crtc_state->di_vsync_pin = tve->di_vsync_pin;
tve               364 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = data;
tve               367 drivers/gpu/drm/imx/imx-tve.c 	regmap_read(tve->regmap, TVE_STAT_REG, &val);
tve               370 drivers/gpu/drm/imx/imx-tve.c 	regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff);
tve               378 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = container_of(hw, struct imx_tve, clk_hw_di);
tve               382 drivers/gpu/drm/imx/imx-tve.c 	ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val);
tve               415 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = container_of(hw, struct imx_tve, clk_hw_di);
tve               428 drivers/gpu/drm/imx/imx-tve.c 	ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
tve               432 drivers/gpu/drm/imx/imx-tve.c 		dev_err(tve->dev, "failed to set divider: %d\n", ret);
tve               445 drivers/gpu/drm/imx/imx-tve.c static int tve_clk_init(struct imx_tve *tve, void __iomem *base)
tve               455 drivers/gpu/drm/imx/imx-tve.c 	tve_di_parent[0] = __clk_get_name(tve->clk);
tve               458 drivers/gpu/drm/imx/imx-tve.c 	tve->clk_hw_di.init = &init;
tve               459 drivers/gpu/drm/imx/imx-tve.c 	tve->di_clk = clk_register(tve->dev, &tve->clk_hw_di);
tve               460 drivers/gpu/drm/imx/imx-tve.c 	if (IS_ERR(tve->di_clk)) {
tve               461 drivers/gpu/drm/imx/imx-tve.c 		dev_err(tve->dev, "failed to register TVE output clock: %ld\n",
tve               462 drivers/gpu/drm/imx/imx-tve.c 			PTR_ERR(tve->di_clk));
tve               463 drivers/gpu/drm/imx/imx-tve.c 		return PTR_ERR(tve->di_clk);
tve               469 drivers/gpu/drm/imx/imx-tve.c static int imx_tve_register(struct drm_device *drm, struct imx_tve *tve)
tve               474 drivers/gpu/drm/imx/imx-tve.c 	encoder_type = tve->mode == TVE_MODE_VGA ?
tve               477 drivers/gpu/drm/imx/imx-tve.c 	ret = imx_drm_encoder_parse_of(drm, &tve->encoder, tve->dev->of_node);
tve               481 drivers/gpu/drm/imx/imx-tve.c 	drm_encoder_helper_add(&tve->encoder, &imx_tve_encoder_helper_funcs);
tve               482 drivers/gpu/drm/imx/imx-tve.c 	drm_encoder_init(drm, &tve->encoder, &imx_tve_encoder_funcs,
tve               485 drivers/gpu/drm/imx/imx-tve.c 	drm_connector_helper_add(&tve->connector,
tve               487 drivers/gpu/drm/imx/imx-tve.c 	drm_connector_init_with_ddc(drm, &tve->connector,
tve               490 drivers/gpu/drm/imx/imx-tve.c 				    tve->ddc);
tve               492 drivers/gpu/drm/imx/imx-tve.c 	drm_connector_attach_encoder(&tve->connector, &tve->encoder);
tve               542 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve;
tve               549 drivers/gpu/drm/imx/imx-tve.c 	tve = devm_kzalloc(dev, sizeof(*tve), GFP_KERNEL);
tve               550 drivers/gpu/drm/imx/imx-tve.c 	if (!tve)
tve               553 drivers/gpu/drm/imx/imx-tve.c 	tve->dev = dev;
tve               554 drivers/gpu/drm/imx/imx-tve.c 	spin_lock_init(&tve->lock);
tve               558 drivers/gpu/drm/imx/imx-tve.c 		tve->ddc = of_find_i2c_adapter_by_node(ddc_node);
tve               562 drivers/gpu/drm/imx/imx-tve.c 	tve->mode = of_get_tve_mode(np);
tve               563 drivers/gpu/drm/imx/imx-tve.c 	if (tve->mode != TVE_MODE_VGA) {
tve               568 drivers/gpu/drm/imx/imx-tve.c 	if (tve->mode == TVE_MODE_VGA) {
tve               570 drivers/gpu/drm/imx/imx-tve.c 					   &tve->di_hsync_pin);
tve               578 drivers/gpu/drm/imx/imx-tve.c 					   &tve->di_vsync_pin);
tve               591 drivers/gpu/drm/imx/imx-tve.c 	tve_regmap_config.lock_arg = tve;
tve               592 drivers/gpu/drm/imx/imx-tve.c 	tve->regmap = devm_regmap_init_mmio_clk(dev, "tve", base,
tve               594 drivers/gpu/drm/imx/imx-tve.c 	if (IS_ERR(tve->regmap)) {
tve               596 drivers/gpu/drm/imx/imx-tve.c 			PTR_ERR(tve->regmap));
tve               597 drivers/gpu/drm/imx/imx-tve.c 		return PTR_ERR(tve->regmap);
tve               608 drivers/gpu/drm/imx/imx-tve.c 					"imx-tve", tve);
tve               614 drivers/gpu/drm/imx/imx-tve.c 	tve->dac_reg = devm_regulator_get(dev, "dac");
tve               615 drivers/gpu/drm/imx/imx-tve.c 	if (!IS_ERR(tve->dac_reg)) {
tve               616 drivers/gpu/drm/imx/imx-tve.c 		if (regulator_get_voltage(tve->dac_reg) != IMX_TVE_DAC_VOLTAGE)
tve               618 drivers/gpu/drm/imx/imx-tve.c 		ret = regulator_enable(tve->dac_reg);
tve               623 drivers/gpu/drm/imx/imx-tve.c 	tve->clk = devm_clk_get(dev, "tve");
tve               624 drivers/gpu/drm/imx/imx-tve.c 	if (IS_ERR(tve->clk)) {
tve               626 drivers/gpu/drm/imx/imx-tve.c 			PTR_ERR(tve->clk));
tve               627 drivers/gpu/drm/imx/imx-tve.c 		return PTR_ERR(tve->clk);
tve               631 drivers/gpu/drm/imx/imx-tve.c 	tve->di_sel_clk = devm_clk_get(dev, "di_sel");
tve               632 drivers/gpu/drm/imx/imx-tve.c 	if (IS_ERR(tve->di_sel_clk)) {
tve               634 drivers/gpu/drm/imx/imx-tve.c 			PTR_ERR(tve->di_sel_clk));
tve               635 drivers/gpu/drm/imx/imx-tve.c 		return PTR_ERR(tve->di_sel_clk);
tve               638 drivers/gpu/drm/imx/imx-tve.c 	ret = tve_clk_init(tve, base);
tve               642 drivers/gpu/drm/imx/imx-tve.c 	ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val);
tve               654 drivers/gpu/drm/imx/imx-tve.c 	ret = regmap_write(tve->regmap, TVE_CD_CONT_REG, 0);
tve               658 drivers/gpu/drm/imx/imx-tve.c 	ret = imx_tve_register(drm, tve);
tve               662 drivers/gpu/drm/imx/imx-tve.c 	dev_set_drvdata(dev, tve);
tve               670 drivers/gpu/drm/imx/imx-tve.c 	struct imx_tve *tve = dev_get_drvdata(dev);
tve               672 drivers/gpu/drm/imx/imx-tve.c 	if (!IS_ERR(tve->dac_reg))
tve               673 drivers/gpu/drm/imx/imx-tve.c 		regulator_disable(tve->dac_reg);