tv_uv_adr 345 drivers/gpu/drm/radeon/radeon_legacy_tv.c static uint16_t radeon_get_htiming_tables_addr(uint32_t tv_uv_adr) tv_uv_adr 349 drivers/gpu/drm/radeon/radeon_legacy_tv.c switch ((tv_uv_adr & RADEON_HCODE_TABLE_SEL_MASK) >> RADEON_HCODE_TABLE_SEL_SHIFT) { tv_uv_adr 354 drivers/gpu/drm/radeon/radeon_legacy_tv.c h_table = ((tv_uv_adr & RADEON_TABLE1_BOT_ADR_MASK) >> RADEON_TABLE1_BOT_ADR_SHIFT) * 2; tv_uv_adr 357 drivers/gpu/drm/radeon/radeon_legacy_tv.c h_table = ((tv_uv_adr & RADEON_TABLE3_TOP_ADR_MASK) >> RADEON_TABLE3_TOP_ADR_SHIFT) * 2; tv_uv_adr 366 drivers/gpu/drm/radeon/radeon_legacy_tv.c static uint16_t radeon_get_vtiming_tables_addr(uint32_t tv_uv_adr) tv_uv_adr 370 drivers/gpu/drm/radeon/radeon_legacy_tv.c switch ((tv_uv_adr & RADEON_VCODE_TABLE_SEL_MASK) >> RADEON_VCODE_TABLE_SEL_SHIFT) { tv_uv_adr 372 drivers/gpu/drm/radeon/radeon_legacy_tv.c v_table = ((tv_uv_adr & RADEON_MAX_UV_ADR_MASK) >> RADEON_MAX_UV_ADR_SHIFT) * 2 + 1; tv_uv_adr 375 drivers/gpu/drm/radeon/radeon_legacy_tv.c v_table = ((tv_uv_adr & RADEON_TABLE1_BOT_ADR_MASK) >> RADEON_TABLE1_BOT_ADR_SHIFT) * 2 + 1; tv_uv_adr 378 drivers/gpu/drm/radeon/radeon_legacy_tv.c v_table = ((tv_uv_adr & RADEON_TABLE3_TOP_ADR_MASK) >> RADEON_TABLE3_TOP_ADR_SHIFT) * 2 + 1; tv_uv_adr 396 drivers/gpu/drm/radeon/radeon_legacy_tv.c WREG32(RADEON_TV_UV_ADR, tv_dac->tv.tv_uv_adr); tv_uv_adr 397 drivers/gpu/drm/radeon/radeon_legacy_tv.c h_table = radeon_get_htiming_tables_addr(tv_dac->tv.tv_uv_adr); tv_uv_adr 398 drivers/gpu/drm/radeon/radeon_legacy_tv.c v_table = radeon_get_vtiming_tables_addr(tv_dac->tv.tv_uv_adr); tv_uv_adr 718 drivers/gpu/drm/radeon/radeon_legacy_tv.c tv_dac->tv.tv_uv_adr = 0xc8; tv_uv_adr 299 drivers/gpu/drm/radeon/radeon_mode.h uint32_t tv_uv_adr;