tv_norm           532 drivers/gpu/drm/i2c/ch7006_drv.c module_param_named(tv_norm, ch7006_tv_norm, charp, 0600);
tv_norm           533 drivers/gpu/drm/i2c/ch7006_drv.c MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
tv_norm           318 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           328 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	do_div(rs[0], overscan * tv_norm->tv_enc_mode.hdisplay);
tv_norm           329 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	do_div(rs[1], overscan * tv_norm->tv_enc_mode.vdisplay);
tv_norm           476 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           513 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	regs->tv_enc[0x20] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x20],
tv_norm           515 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	regs->tv_enc[0x22] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x22],
tv_norm            37 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
tv_norm            43 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
tv_norm           203 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           212 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		mode->clock = tv_norm->tv_enc_mode.vrefresh *
tv_norm           219 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		if (mode->hdisplay == tv_norm->tv_enc_mode.hdisplay &&
tv_norm           220 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		    mode->vdisplay == tv_norm->tv_enc_mode.vdisplay)
tv_norm           233 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           234 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct drm_display_mode *output_mode = &tv_norm->ctv_enc_mode.mode;
tv_norm           295 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           297 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	if (tv_norm->kind == CTV_ENC_MODE)
tv_norm           306 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           308 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	if (tv_norm->kind == CTV_ENC_MODE) {
tv_norm           310 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 						&tv_norm->ctv_enc_mode.mode;
tv_norm           333 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			tv_norm->tv_enc_mode.vrefresh) > vsync_tolerance)
tv_norm           348 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           353 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	if (tv_norm->kind == CTV_ENC_MODE)
tv_norm           354 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		adjusted_mode->clock = tv_norm->ctv_enc_mode.mode.clock;
tv_norm           367 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           378 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	if (tv_norm->kind == CTV_ENC_MODE) {
tv_norm           401 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           415 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	if (tv_norm->kind == CTV_ENC_MODE) {
tv_norm           432 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	if (tv_norm->kind == CTV_ENC_MODE)
tv_norm           441 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	if (tv_norm->kind == CTV_ENC_MODE) {
tv_norm           466 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           475 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	if (tv_norm->kind == TV_ENC_MODE) {
tv_norm           486 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		if (tv_norm->tv_enc_mode.vdisplay == 576) {
tv_norm           490 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		} else if (tv_norm->tv_enc_mode.vdisplay == 480) {
tv_norm           501 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			if (tv_norm->tv_enc_mode.vdisplay == 576) {
tv_norm           507 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			} else if (tv_norm->tv_enc_mode.vdisplay == 480) {
tv_norm           516 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			tv_regs->tv_enc[i] = tv_norm->tv_enc_mode.tv_enc[i];
tv_norm           520 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 						&tv_norm->ctv_enc_mode.mode;
tv_norm           531 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			regs->ctv_regs[i] = tv_norm->ctv_enc_mode.ctv_regs[i];
tv_norm           649 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 				tv_enc->tv_norm = i;
tv_norm           669 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 					tv_enc->tv_norm);
tv_norm           694 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
tv_norm           700 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			if (tv_norm->kind == CTV_ENC_MODE)
tv_norm           707 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		if (tv_norm->kind != TV_ENC_MODE)
tv_norm           714 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		if (tv_norm->kind != TV_ENC_MODE)
tv_norm           721 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		if (tv_norm->kind != TV_ENC_MODE)
tv_norm           732 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->tv_norm = val;
tv_norm           737 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		if (tv_norm->kind != TV_ENC_MODE)
tv_norm           804 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->tv_norm = TV_NORM_PAL;
tv_norm            80 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h 	enum nv17_tv_norm tv_norm;
tv_norm           113 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h #define get_tv_norm(enc) (&nv17_tv_norms[to_tv_enc(enc)->tv_norm])