tv_enc            317 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
tv_enc            320 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	uint32_t (*filters[])[4][7] = {&tv_enc->state.hfilter,
tv_enc            321 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 				       &tv_enc->state.vfilter};
tv_enc            323 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	int32_t overscan = calc_overscan(tv_enc->overscan);
tv_enc            324 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	int64_t flicker = (tv_enc->flicker - 50) * (id3 / 100);
tv_enc            385 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		state->tv_enc[i] = nv_read_tv_enc(dev, i);
tv_enc            412 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		nv_write_tv_enc(dev, i, state->tv_enc[i]);
tv_enc            474 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
tv_enc            475 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	struct nv17_tv_state *regs = &tv_enc->state;
tv_enc            477 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	int subconnector = tv_enc->select_subconnector ?
tv_enc            478 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 						tv_enc->select_subconnector :
tv_enc            479 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 						tv_enc->subconnector;
tv_enc            487 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		if (tv_enc->pin_mask & 0x4)
tv_enc            489 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		else if (tv_enc->pin_mask & 0x2)
tv_enc            494 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		regs->tv_enc[0x7] = 0x10;
tv_enc            499 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		regs->tv_enc[0x7] = 0x18;
tv_enc            504 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		regs->tv_enc[0x7] = 0x14;
tv_enc            509 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		regs->tv_enc[0x7] = 0x18;
tv_enc            513 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	regs->tv_enc[0x20] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x20],
tv_enc            514 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 					 255, tv_enc->saturation);
tv_enc            515 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	regs->tv_enc[0x22] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x22],
tv_enc            516 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 					 255, tv_enc->saturation);
tv_enc            517 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	regs->tv_enc[0x25] = tv_enc->hue * 255 / 100;
tv_enc            529 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
tv_enc            530 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	struct nv17_tv_state *regs = &tv_enc->state;
tv_enc            532 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	regs->ptv_208 = 0x40 | (calc_overscan(tv_enc->overscan) << 8);
tv_enc            545 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
tv_enc            557 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c 		overscan = tv_enc->overscan;
tv_enc            149 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
tv_enc            150 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct dcb_output *dcb = tv_enc->base.dcb;
tv_enc            151 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	bool reliable = get_tv_detect_quirks(dev, &tv_enc->pin_mask);
tv_enc            159 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			tv_enc->pin_mask =
tv_enc            162 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			tv_enc->pin_mask =
tv_enc            166 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	switch (tv_enc->pin_mask) {
tv_enc            169 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Composite;
tv_enc            172 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SVIDEO;
tv_enc            176 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Component;
tv_enc            178 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SCART;
tv_enc            181 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
tv_enc            187 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 					 tv_enc->subconnector);
tv_enc            191 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	} else if (tv_enc->subconnector) {
tv_enc            516 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 			tv_regs->tv_enc[i] = tv_norm->tv_enc_mode.tv_enc[i];
tv_enc            609 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
tv_enc            616 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	nv17_tv_state_save(dev, &tv_enc->saved_state);
tv_enc            618 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->state.ptv_200 = tv_enc->saved_state.ptv_200;
tv_enc            640 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
tv_enc            649 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 				tv_enc->tv_norm = i;
tv_enc            663 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 					tv_enc->select_subconnector);
tv_enc            666 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 					tv_enc->subconnector);
tv_enc            669 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 					tv_enc->tv_norm);
tv_enc            672 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 					tv_enc->flicker);
tv_enc            675 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 					tv_enc->saturation);
tv_enc            678 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 					tv_enc->hue);
tv_enc            681 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 					tv_enc->overscan);
tv_enc            693 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
tv_enc            698 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->overscan = val;
tv_enc            710 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->saturation = val;
tv_enc            717 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->hue = val;
tv_enc            724 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->flicker = val;
tv_enc            732 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->tv_norm = val;
tv_enc            740 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		tv_enc->select_subconnector = val;
tv_enc            763 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
tv_enc            766 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	kfree(tv_enc);
tv_enc            794 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nv17_tv_encoder *tv_enc = NULL;
tv_enc            796 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc = kzalloc(sizeof(*tv_enc), GFP_KERNEL);
tv_enc            797 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	if (!tv_enc)
tv_enc            800 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->overscan = 50;
tv_enc            801 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->flicker = 50;
tv_enc            802 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->saturation = 50;
tv_enc            803 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->hue = 0;
tv_enc            804 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->tv_norm = TV_NORM_PAL;
tv_enc            805 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
tv_enc            806 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->select_subconnector = DRM_MODE_SUBCONNECTOR_Automatic;
tv_enc            807 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->pin_mask = 0;
tv_enc            809 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	encoder = to_drm_encoder(&tv_enc->base);
tv_enc            811 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->base.dcb = entry;
tv_enc            812 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->base.or = ffs(entry->or) - 1;
tv_enc            819 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->base.enc_save = nv17_tv_save;
tv_enc            820 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	tv_enc->base.enc_restore = nv17_tv_restore;
tv_enc             31 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h 	uint8_t tv_enc[0x40];
tv_enc            102 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h 			uint8_t tv_enc[0x40];
tv_enc            161 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h 	nv_write_tv_enc(dev, 0x##reg, state->tv_enc[0x##reg])