ttu_regs          449 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &pipe->ttu_regs;
ttu_regs          460 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	memset(ttu_regs, 0, sizeof(*ttu_regs));
ttu_regs          499 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			ttu_regs,
ttu_regs          226 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &s->ttu_attr;
ttu_regs          230 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank,
ttu_regs          231 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delivery_l,
ttu_regs          232 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				ttu_regs->refcyc_per_req_delivery_pre_c, ttu_regs->refcyc_per_req_delivery_c, ttu_regs->refcyc_per_req_delivery_cur0,
ttu_regs          233 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				ttu_regs->refcyc_per_req_delivery_pre_cur0, ttu_regs->refcyc_per_req_delivery_cur1,
ttu_regs          234 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
ttu_regs          235 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				ttu_regs->qos_level_fixed_c, ttu_regs->qos_ramp_disable_c, ttu_regs->qos_level_fixed_cur0,
ttu_regs          236 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				ttu_regs->qos_ramp_disable_cur0, ttu_regs->qos_level_fixed_cur1, ttu_regs->qos_ramp_disable_cur1);
ttu_regs         2325 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 			&pipe_ctx->ttu_regs,
ttu_regs         2331 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 			&pipe_ctx->ttu_regs);
ttu_regs         2644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				&pipe_ctx->ttu_regs);
ttu_regs          304 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 		struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &s->ttu_attr;
ttu_regs          311 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank,
ttu_regs          312 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delivery_l,
ttu_regs          313 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				ttu_regs->refcyc_per_req_delivery_pre_c, ttu_regs->refcyc_per_req_delivery_c, ttu_regs->refcyc_per_req_delivery_cur0,
ttu_regs          314 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				ttu_regs->refcyc_per_req_delivery_pre_cur0, ttu_regs->refcyc_per_req_delivery_cur1,
ttu_regs          315 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disable_l,
ttu_regs          316 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				ttu_regs->qos_level_fixed_c, ttu_regs->qos_ramp_disable_c, ttu_regs->qos_level_fixed_cur0,
ttu_regs          317 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				ttu_regs->qos_ramp_disable_cur0, ttu_regs->qos_level_fixed_cur1, ttu_regs->qos_ramp_disable_cur1);
ttu_regs         1242 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 				&pipe_ctx->ttu_regs);
ttu_regs         1347 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 					&pipe_ctx->ttu_regs,
ttu_regs         2823 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 				&context->res_ctx.pipe_ctx[i].ttu_regs,
ttu_regs         1565 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		display_ttu_regs_st *ttu_regs,
ttu_regs         1607 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 			ttu_regs,
ttu_regs           64 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h 		display_ttu_regs_st *ttu_regs,
ttu_regs         1565 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		display_ttu_regs_st *ttu_regs,
ttu_regs         1607 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 			ttu_regs,
ttu_regs           64 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.h 		display_ttu_regs_st *ttu_regs,
ttu_regs         1666 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		display_ttu_regs_st *ttu_regs,
ttu_regs         1712 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 			ttu_regs,
ttu_regs           63 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.h 		display_ttu_regs_st *ttu_regs,
ttu_regs           52 drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h 			display_ttu_regs_st *ttu_regs,
ttu_regs          331 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c void print__ttu_regs_st(struct display_mode_lib *mode_lib, display_ttu_regs_st ttu_regs)
ttu_regs          337 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_level_low_wm);
ttu_regs          340 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_level_high_wm);
ttu_regs          343 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.min_ttu_vblank);
ttu_regs          346 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_level_flip);
ttu_regs          349 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_pre_l);
ttu_regs          352 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_l);
ttu_regs          355 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_pre_c);
ttu_regs          358 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_c);
ttu_regs          361 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_cur0);
ttu_regs          364 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_pre_cur0);
ttu_regs          367 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_cur1);
ttu_regs          370 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.refcyc_per_req_delivery_pre_cur1);
ttu_regs          373 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_level_fixed_l);
ttu_regs          376 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_ramp_disable_l);
ttu_regs          379 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_level_fixed_c);
ttu_regs          382 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_ramp_disable_c);
ttu_regs          385 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_level_fixed_cur0);
ttu_regs          388 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_ramp_disable_cur0);
ttu_regs          391 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_level_fixed_cur1);
ttu_regs          394 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			ttu_regs.qos_ramp_disable_cur1);
ttu_regs           45 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.h void print__ttu_regs_st(struct display_mode_lib *mode_lib, display_ttu_regs_st ttu_regs);
ttu_regs           59 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.h 		struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
ttu_regs          308 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	struct _vcs_dpi_display_ttu_regs_st ttu_regs;
ttu_regs           72 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h 			struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
ttu_regs           79 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h 			struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
ttu_regs           96 drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h 			struct _vcs_dpi_display_ttu_regs_st *ttu_regs,