tsr_hwm           806 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t tsr_hwm:3;
tsr_hwm           814 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t tsr_hwm:3;
tsr_hwm           849 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t tsr_hwm:3;
tsr_hwm           857 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t tsr_hwm:3;
tsr_hwm           387 arch/mips/pci/pci-octeon.c 	ctl_status_2.s.tsr_hwm = 1;	/* Initializes to 0.  Must be set