TX1_A 949 drivers/pinctrl/sh-pfc/pfc-r8a77470.c PINMUX_IPSR_MSEL(IP12_27_24, TX1_A, SEL_SCIF1_0), TX1_A 1088 drivers/pinctrl/sh-pfc/pfc-r8a7778.c PINMUX_IPSR_GPSR(IP8_13_11, TX1_A), TX1_A 1477 drivers/pinctrl/sh-pfc/pfc-r8a7778.c SCIF_PFC_DAT(scif1_data_a, TX1_A, RX1_A); TX1_A 204 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define GPSR5_6 F_(TX1_A, IP11_19_16) TX1_A 350 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP11_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0_C) FM(RIF1_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) TX1_A 1176 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP11_19_16, TX1_A, SEL_SCIF1_0), TX1_A 205 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define GPSR5_6 F_(TX1_A, IP12_19_16) TX1_A 360 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0_C) FM(RIF1_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) TX1_A 1222 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP12_19_16, TX1_A, SEL_SCIF1_0), TX1_A 209 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define GPSR5_6 F_(TX1_A, IP12_19_16) TX1_A 364 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0_C) FM(RIF1_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) TX1_A 1228 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP12_19_16, TX1_A, SEL_SCIF1_0), TX1_A 210 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define GPSR5_6 F_(TX1_A, IP12_19_16) TX1_A 365 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0_C) FM(RIF1_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) TX1_A 1232 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP12_19_16, TX1_A, SEL_SCIF1_0), TX1_A 185 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP4_3_0 FM(VI0_DATA5) FM(HCTS1_N) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) TX1_A 522 drivers/pinctrl/sh-pfc/pfc-r8a77970.c PINMUX_IPSR_MSEL(IP4_3_0, TX1_A, SEL_SCIF1_0), TX1_A 218 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP4_3_0 FM(VI0_DATA5) FM(HCTS1_N) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) TX1_A 604 drivers/pinctrl/sh-pfc/pfc-r8a77980.c PINMUX_IPSR_MSEL(IP4_3_0, TX1_A, SEL_SCIF1_0), TX1_A 133 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define GPSR4_24 F_(TX1_A, IP12_7_4) TX1_A 302 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define IP12_7_4 FM(TX1_A) FM(RTS0_N) FM(TPU0TO1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) TX1_A 895 drivers/pinctrl/sh-pfc/pfc-r8a77995.c PINMUX_IPSR_MSEL(IP12_7_4, TX1_A, SEL_SCIF1_0), TX1_A 892 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_MSEL(IP4_14_12, TX1_A, SEL_SCIF1_0), TX1_A 1471 drivers/pinctrl/sh-pfc/pfc-sh7734.c GPIO_FN(HTX0_A), GPIO_FN(TX1_A), GPIO_FN(VI0_DATA1_VI0_B1), TX1_A 1170 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c u32 Oldval_1, X, TX1_A, reg; TX1_A 1188 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c TX1_A = (X * Oldval_1) >> 8; TX1_A 1189 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); TX1_A 1191 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);