tre 18 drivers/dma/qcom/hidma_dbg.c struct hidma_tre *tre; tre 28 drivers/dma/qcom/hidma_dbg.c tre = &lldev->trepool[tre_ch]; tre 30 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "allocated=%d\n", atomic_read(&tre->allocated)); tre 31 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "queued = 0x%x\n", tre->queued); tre 32 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "err_info = 0x%x\n", tre->err_info); tre 33 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "err_code = 0x%x\n", tre->err_code); tre 34 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "status = 0x%x\n", tre->status); tre 35 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "idx = 0x%x\n", tre->idx); tre 36 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "dma_sig = 0x%x\n", tre->dma_sig); tre 37 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "dev_name=%s\n", tre->dev_name); tre 38 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "callback=%p\n", tre->callback); tre 39 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "data=%p\n", tre->data); tre 40 drivers/dma/qcom/hidma_dbg.c seq_printf(s, "tre_index = 0x%x\n", tre->tre_index); tre 42 drivers/dma/qcom/hidma_dbg.c tre_local = &tre->tre_local[0]; tre 118 drivers/dma/qcom/hidma_ll.c struct hidma_tre *tre; tre 125 drivers/dma/qcom/hidma_ll.c tre = &lldev->trepool[tre_ch]; tre 126 drivers/dma/qcom/hidma_ll.c if (atomic_read(&tre->allocated) != true) { tre 131 drivers/dma/qcom/hidma_ll.c atomic_set(&tre->allocated, 0); tre 138 drivers/dma/qcom/hidma_ll.c struct hidma_tre *tre; tre 153 drivers/dma/qcom/hidma_ll.c tre = &lldev->trepool[i]; tre 154 drivers/dma/qcom/hidma_ll.c tre->dma_sig = sig; tre 155 drivers/dma/qcom/hidma_ll.c tre->dev_name = dev_name; tre 156 drivers/dma/qcom/hidma_ll.c tre->callback = callback; tre 157 drivers/dma/qcom/hidma_ll.c tre->data = data; tre 158 drivers/dma/qcom/hidma_ll.c tre->idx = i; tre 159 drivers/dma/qcom/hidma_ll.c tre->status = 0; tre 160 drivers/dma/qcom/hidma_ll.c tre->queued = 0; tre 161 drivers/dma/qcom/hidma_ll.c tre->err_code = 0; tre 162 drivers/dma/qcom/hidma_ll.c tre->err_info = 0; tre 163 drivers/dma/qcom/hidma_ll.c tre->lldev = lldev; tre 164 drivers/dma/qcom/hidma_ll.c tre_local = &tre->tre_local[0]; tre 179 drivers/dma/qcom/hidma_ll.c struct hidma_tre *tre; tre 181 drivers/dma/qcom/hidma_ll.c while (kfifo_out(&lldev->handoff_fifo, &tre, 1)) { tre 183 drivers/dma/qcom/hidma_ll.c if (tre->callback) tre 184 drivers/dma/qcom/hidma_ll.c tre->callback(tre->data); tre 191 drivers/dma/qcom/hidma_ll.c struct hidma_tre *tre; tre 198 drivers/dma/qcom/hidma_ll.c tre = lldev->pending_tre_list[tre_iterator / HIDMA_TRE_SIZE]; tre 199 drivers/dma/qcom/hidma_ll.c if (!tre) { tre 205 drivers/dma/qcom/hidma_ll.c lldev->pending_tre_list[tre->tre_index] = NULL; tre 221 drivers/dma/qcom/hidma_ll.c tre->err_info = err_info; tre 222 drivers/dma/qcom/hidma_ll.c tre->err_code = err_code; tre 223 drivers/dma/qcom/hidma_ll.c tre->queued = 0; tre 225 drivers/dma/qcom/hidma_ll.c kfifo_put(&lldev->handoff_fifo, tre); tre 526 drivers/dma/qcom/hidma_ll.c struct hidma_tre *tre; tre 529 drivers/dma/qcom/hidma_ll.c tre = &lldev->trepool[tre_ch]; tre 533 drivers/dma/qcom/hidma_ll.c tre->tre_index = lldev->tre_write_offset / HIDMA_TRE_SIZE; tre 534 drivers/dma/qcom/hidma_ll.c lldev->pending_tre_list[tre->tre_index] = tre; tre 536 drivers/dma/qcom/hidma_ll.c &tre->tre_local[0], HIDMA_TRE_SIZE); tre 537 drivers/dma/qcom/hidma_ll.c tre->err_code = 0; tre 538 drivers/dma/qcom/hidma_ll.c tre->err_info = 0; tre 539 drivers/dma/qcom/hidma_ll.c tre->queued = 1; tre 602 drivers/dma/qcom/hidma_ll.c struct hidma_tre *tre; tre 611 drivers/dma/qcom/hidma_ll.c tre = &lldev->trepool[tre_ch]; tre 612 drivers/dma/qcom/hidma_ll.c if (atomic_read(&tre->allocated) != true) { tre 618 drivers/dma/qcom/hidma_ll.c tre_local = &tre->tre_local[0]; tre 626 drivers/dma/qcom/hidma_ll.c tre->int_flags = flags; tre 837 drivers/dma/qcom/hidma_ll.c struct hidma_tre *tre; tre 843 drivers/dma/qcom/hidma_ll.c tre = &lldev->trepool[tre_ch]; tre 844 drivers/dma/qcom/hidma_ll.c err_code = tre->err_code; tre 2737 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c unsigned int tre = fls(core_clk / (1000000 / TP_TMR_RES)) - 1; tre 2740 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c unsigned int tps = core_clk >> tre; tre 2742 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c t3_write_reg(adap, A_TP_TIMER_RESOLUTION, V_TIMERRESOLUTION(tre) | tre 152 drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h u32 tre; tre 1564 drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c clk_info_buff->tre = TIMERRESOLUTION_G(clk_info_buff->res); tre 1566 drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c tp_tick_us = (clk_info_buff->cclk_ps << clk_info_buff->tre) / 1000000; tre 274 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h unsigned int tre; /* log2 of core clocks per TP tick */ tre 908 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c unsigned int tre = TIMERRESOLUTION_G(res); tre 910 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */ tre 915 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000)); tre 9409 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c adap->params.tp.tre = TIMERRESOLUTION_G(v);