CM_DGAM_LUT_WRITE_SEL  314 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	TF_SF(CM0_CM_DGAM_LUT_WRITE_EN_MASK, CM_DGAM_LUT_WRITE_SEL, mask_sh), \
CM_DGAM_LUT_WRITE_SEL 1054 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	type CM_DGAM_LUT_WRITE_SEL; \
CM_DGAM_LUT_WRITE_SEL  681 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	REG_UPDATE(CM_DGAM_LUT_WRITE_EN_MASK, CM_DGAM_LUT_WRITE_SEL,
CM_DGAM_LUT_WRITE_SEL   96 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 	REG_UPDATE(CM_DGAM_LUT_WRITE_EN_MASK, CM_DGAM_LUT_WRITE_SEL,