TSI148_LCSR_OT    903 drivers/vme/bridges/vme_tsi148.c 	temp_ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT    906 drivers/vme/bridges/vme_tsi148.c 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1008 drivers/vme/bridges/vme_tsi148.c 	iowrite32be(pci_base_high, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1010 drivers/vme/bridges/vme_tsi148.c 	iowrite32be(pci_base_low, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1012 drivers/vme/bridges/vme_tsi148.c 	iowrite32be(pci_bound_high, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1014 drivers/vme/bridges/vme_tsi148.c 	iowrite32be(pci_bound_low, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1016 drivers/vme/bridges/vme_tsi148.c 	iowrite32be(vme_offset_high, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1018 drivers/vme/bridges/vme_tsi148.c 	iowrite32be(vme_offset_low, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1022 drivers/vme/bridges/vme_tsi148.c 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1028 drivers/vme/bridges/vme_tsi148.c 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1065 drivers/vme/bridges/vme_tsi148.c 	ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1068 drivers/vme/bridges/vme_tsi148.c 	pci_base_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1070 drivers/vme/bridges/vme_tsi148.c 	pci_base_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1072 drivers/vme/bridges/vme_tsi148.c 	pci_bound_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1074 drivers/vme/bridges/vme_tsi148.c 	pci_bound_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1076 drivers/vme/bridges/vme_tsi148.c 	vme_offset_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1078 drivers/vme/bridges/vme_tsi148.c 	vme_offset_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1384 drivers/vme/bridges/vme_tsi148.c 	pci_addr_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   1386 drivers/vme/bridges/vme_tsi148.c 	pci_addr_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT   2586 drivers/vme/bridges/vme_tsi148.c 		iowrite32be(0, bridge->base + TSI148_LCSR_OT[i] +
TSI148_LCSR_OT    198 drivers/vme/bridges/vme_tsi148.h static const int TSI148_LCSR_OT[8] = { TSI148_LCSR_OT0, TSI148_LCSR_OT1,