TSI148_LCSR_DMA  1792 drivers/vme/bridges/vme_tsi148.c 	tmp = ioread32be(bridge->base + TSI148_LCSR_DMA[channel] +
TSI148_LCSR_DMA  1849 drivers/vme/bridges/vme_tsi148.c 		TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DNLAU);
TSI148_LCSR_DMA  1851 drivers/vme/bridges/vme_tsi148.c 		TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DNLAL);
TSI148_LCSR_DMA  1853 drivers/vme/bridges/vme_tsi148.c 	dctlreg = ioread32be(bridge->base + TSI148_LCSR_DMA[channel] +
TSI148_LCSR_DMA  1858 drivers/vme/bridges/vme_tsi148.c 		TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCTL);
TSI148_LCSR_DMA  1865 drivers/vme/bridges/vme_tsi148.c 			TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCTL);
TSI148_LCSR_DMA  1877 drivers/vme/bridges/vme_tsi148.c 	val = ioread32be(bridge->base + TSI148_LCSR_DMA[channel] +
TSI148_LCSR_DMA   468 drivers/vme/bridges/vme_tsi148.h static const int TSI148_LCSR_DMA[TSI148_MAX_DMA] = { TSI148_LCSR_DMA0,