TSB 77 arch/sparc/include/asm/tsb.h #define TSB_LOAD_QUAD(TSB, REG) \ TSB 78 arch/sparc/include/asm/tsb.h 661: ldda [TSB] ASI_NUCLEUS_QUAD_LDD, REG; \ TSB 81 arch/sparc/include/asm/tsb.h ldda [TSB] ASI_QUAD_LDD_PHYS, REG; \ TSB 82 arch/sparc/include/asm/tsb.h ldda [TSB] ASI_QUAD_LDD_PHYS_4V, REG; \ TSB 85 arch/sparc/include/asm/tsb.h #define TSB_LOAD_TAG_HIGH(TSB, REG) \ TSB 86 arch/sparc/include/asm/tsb.h 661: lduwa [TSB] ASI_N, REG; \ TSB 89 arch/sparc/include/asm/tsb.h lduwa [TSB] ASI_PHYS_USE_EC, REG; \ TSB 92 arch/sparc/include/asm/tsb.h #define TSB_LOAD_TAG(TSB, REG) \ TSB 93 arch/sparc/include/asm/tsb.h 661: ldxa [TSB] ASI_N, REG; \ TSB 96 arch/sparc/include/asm/tsb.h ldxa [TSB] ASI_PHYS_USE_EC, REG; \ TSB 99 arch/sparc/include/asm/tsb.h #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \ TSB 100 arch/sparc/include/asm/tsb.h 661: casa [TSB] ASI_N, REG1, REG2; \ TSB 103 arch/sparc/include/asm/tsb.h casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ TSB 106 arch/sparc/include/asm/tsb.h #define TSB_CAS_TAG(TSB, REG1, REG2) \ TSB 107 arch/sparc/include/asm/tsb.h 661: casxa [TSB] ASI_N, REG1, REG2; \ TSB 110 arch/sparc/include/asm/tsb.h casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ TSB 120 arch/sparc/include/asm/tsb.h #define TSB_LOCK_TAG(TSB, REG1, REG2) \ TSB 121 arch/sparc/include/asm/tsb.h 99: TSB_LOAD_TAG_HIGH(TSB, REG1); \ TSB 126 arch/sparc/include/asm/tsb.h TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \ TSB 131 arch/sparc/include/asm/tsb.h #define TSB_WRITE(TSB, TTE, TAG) \ TSB 132 arch/sparc/include/asm/tsb.h add TSB, 0x8, TSB; \ TSB 133 arch/sparc/include/asm/tsb.h TSB_STORE(TSB, TTE); \ TSB 134 arch/sparc/include/asm/tsb.h sub TSB, 0x8, TSB; \ TSB 135 arch/sparc/include/asm/tsb.h TSB_STORE(TSB, TAG);