TLS                15 arch/arm/include/asm/tls.h 	mcr	p15, 0, \tp, c13, c0, 3		@ set TLS register
TLS                24 arch/arm/include/asm/tls.h 	tst	\tmp1, #HWCAP_TLS		@ hardware TLS available?
TLS                25 arch/arm/include/asm/tls.h 	streq	\tp, [\tmp2, #-15]		@ set TLS value at 0xffff0ff0
TLS                27 arch/arm/include/asm/tls.h 	mcrne	p15, 0, \tp, c13, c0, 3		@ yes, set TLS register
TLS                34 arch/arm/include/asm/tls.h 	str	\tp, [\tmp1, #-15]		@ set TLS value at 0xffff0ff0
TLS                53 tools/perf/arch/csky/util/unwind-libdw.c 	dwarf_regs[31] = REG(TLS);