total_display_reads_required_data  278 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h 				bw_fixed_to_int(data->total_display_reads_required_data));
total_display_reads_required_data 1132 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->total_display_reads_required_data = bw_int_to_fixed(0);
total_display_reads_required_data 1156 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->total_display_reads_required_data = bw_add(data->total_display_reads_required_data, data->display_reads_required_data);
total_display_reads_required_data 1165 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->total_display_reads_required_data = bw_add(bw_add(data->total_display_reads_required_data, data->cursor_total_data), bw_mul(data->scatter_gather_total_pte_requests, bw_int_to_fixed(64)));
total_display_reads_required_data 1188 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->dmif_burst_time[i][j] = bw_max3(data->dmif_total_page_close_open_time, bw_div(data->total_display_reads_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))), bw_div(data->total_display_reads_required_data, (bw_mul(bw_mul(sclk[j], vbios->data_return_bus_width), bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100)))));
total_display_reads_required_data 1568 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->dmif_required_sclk = bw_div(bw_div(data->total_display_reads_required_data, data->display_reads_time_for_data_transfer), (bw_mul(vbios->data_return_bus_width, bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100))));
total_display_reads_required_data 1999 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->dmif_required_sclk_for_urgent_latency[i] = bw_div(bw_div(data->total_display_reads_required_data, data->display_reads_time_for_data_transfer_and_urgent_latency), (bw_mul(vbios->data_return_bus_width, bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100))));
total_display_reads_required_data  301 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h 	struct bw_fixed total_display_reads_required_data;