topdown            25 arch/powerpc/include/asm/slice.h 				      int topdown);
topdown           386 arch/powerpc/mm/slice.c 				     int topdown, unsigned long high_limit)
topdown           388 arch/powerpc/mm/slice.c 	if (topdown)
topdown           431 arch/powerpc/mm/slice.c 				      int topdown)
topdown           477 arch/powerpc/mm/slice.c 		  addr, len, flags, topdown);
topdown           547 arch/powerpc/mm/slice.c 					  psize, topdown, high_limit);
topdown           583 arch/powerpc/mm/slice.c 					  psize, topdown, high_limit);
topdown           594 arch/powerpc/mm/slice.c 				  psize, topdown, high_limit);
topdown           601 arch/powerpc/mm/slice.c 					  psize, topdown, high_limit);
topdown           296 arch/x86/events/intel/core.c EVENT_ATTR_STR_HT(topdown-total-slots, td_total_slots,
topdown           299 arch/x86/events/intel/core.c EVENT_ATTR_STR_HT(topdown-total-slots.scale, td_total_slots_scale, "4", "2");
topdown           300 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-slots-issued, td_slots_issued,
topdown           302 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-slots-retired, td_slots_retired,
topdown           304 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-fetch-bubbles, td_fetch_bubbles,
topdown           306 arch/x86/events/intel/core.c EVENT_ATTR_STR_HT(topdown-recovery-bubbles, td_recovery_bubbles,
topdown           309 arch/x86/events/intel/core.c EVENT_ATTR_STR_HT(topdown-recovery-bubbles.scale, td_recovery_bubbles_scale,
topdown          1436 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-total-slots, td_total_slots_slm, "event=0x3c");
topdown          1437 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-total-slots.scale, td_total_slots_scale_slm, "2");
topdown          1439 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-fetch-bubbles, td_fetch_bubbles_slm,
topdown          1441 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-fetch-bubbles.scale, td_fetch_bubbles_scale_slm, "2");
topdown          1443 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-slots-issued, td_slots_issued_slm,
topdown          1446 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-slots-retired, td_slots_retired_slm,
topdown          1592 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-total-slots, td_total_slots_glm, "event=0x3c");
topdown          1593 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-total-slots.scale, td_total_slots_scale_glm, "3");
topdown          1595 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-fetch-bubbles, td_fetch_bubbles_glm, "event=0x9c");
topdown          1597 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-recovery-bubbles, td_recovery_bubbles_glm, "event=0xca,umask=0x02");
topdown          1599 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-slots-retired, td_slots_retired_glm, "event=0xc2");
topdown          1601 arch/x86/events/intel/core.c EVENT_ATTR_STR(topdown-slots-issued, td_slots_issued_glm, "event=0x0e");
topdown            23 drivers/gpu/drm/selftests/drm_mm_selftests.h selftest(topdown, igt_topdown)
topdown          1615 drivers/gpu/drm/selftests/test-drm_mm.c 	const struct insert_mode *topdown = &insert_modes[TOPDOWN];
topdown          1649 drivers/gpu/drm/selftests/test-drm_mm.c 					   topdown)) {
topdown          1681 drivers/gpu/drm/selftests/test-drm_mm.c 						   topdown)) {
topdown            93 tools/perf/util/stat.c 	ID(TOPDOWN_TOTAL_SLOTS, topdown-total-slots),
topdown            94 tools/perf/util/stat.c 	ID(TOPDOWN_SLOTS_ISSUED, topdown-slots-issued),
topdown            95 tools/perf/util/stat.c 	ID(TOPDOWN_SLOTS_RETIRED, topdown-slots-retired),
topdown            96 tools/perf/util/stat.c 	ID(TOPDOWN_FETCH_BUBBLES, topdown-fetch-bubbles),
topdown            97 tools/perf/util/stat.c 	ID(TOPDOWN_RECOVERY_BUBBLES, topdown-recovery-bubbles),