tmu_write_count    59 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	int tmu_write_count[2];
tmu_write_count   195 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	bool is_direct = submit && validation_state->tmu_write_count[tmu] == 0;
tmu_write_count   255 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	if (validation_state->tmu_write_count[tmu] >= 4) {
tmu_write_count   260 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	validation_state->tmu_setup[tmu].p_offset[validation_state->tmu_write_count[tmu]] =
tmu_write_count   262 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	validation_state->tmu_write_count[tmu]++;
tmu_write_count   281 drivers/gpu/drm/vc4/vc4_validate_shaders.c 		validation_state->tmu_write_count[tmu] = 0;
tmu_write_count   740 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	return (validation_state->tmu_write_count[0] != 0 ||
tmu_write_count   741 drivers/gpu/drm/vc4/vc4_validate_shaders.c 		validation_state->tmu_write_count[1] != 0);