tmu_setup          58 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	struct vc4_texture_sample_info tmu_setup[2];
tmu_setup         170 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	       &validation_state->tmu_setup[tmu],
tmu_setup         177 drivers/gpu/drm/vc4/vc4_validate_shaders.c 		validation_state->tmu_setup[tmu].p_offset[i] = ~0;
tmu_setup         236 drivers/gpu/drm/vc4/vc4_validate_shaders.c 		validation_state->tmu_setup[tmu].p_offset[1] =
tmu_setup         245 drivers/gpu/drm/vc4/vc4_validate_shaders.c 		validation_state->tmu_setup[tmu].is_direct = true;
tmu_setup         260 drivers/gpu/drm/vc4/vc4_validate_shaders.c 	validation_state->tmu_setup[tmu].p_offset[validation_state->tmu_write_count[tmu]] =
tmu_setup         728 drivers/gpu/drm/vc4/vc4_validate_shaders.c 		validation_state->tmu_setup[i / 4].p_offset[i % 4] = ~0;