tmp_             1091 drivers/gpu/drm/amd/amdgpu/amdgpu.h 		uint32_t tmp_ = RREG32(reg);			\
tmp_             1092 drivers/gpu/drm/amd/amdgpu/amdgpu.h 		tmp_ &= (mask);					\
tmp_             1093 drivers/gpu/drm/amd/amdgpu/amdgpu.h 		tmp_ |= ((val) & ~(mask));			\
tmp_             1094 drivers/gpu/drm/amd/amdgpu/amdgpu.h 		WREG32(reg, tmp_);				\
tmp_             1100 drivers/gpu/drm/amd/amdgpu/amdgpu.h 		uint32_t tmp_ = RREG32_PLL(reg);		\
tmp_             1101 drivers/gpu/drm/amd/amdgpu/amdgpu.h 		tmp_ &= (mask);					\
tmp_             1102 drivers/gpu/drm/amd/amdgpu/amdgpu.h 		tmp_ |= ((val) & ~(mask));			\
tmp_             1103 drivers/gpu/drm/amd/amdgpu/amdgpu.h 		WREG32_PLL(reg, tmp_);				\
tmp_               53 drivers/gpu/drm/amd/amdgpu/soc15_common.h 		uint32_t tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
tmp_               56 drivers/gpu/drm/amd/amdgpu/soc15_common.h 		while ((tmp_ & (mask)) != (expected_value)) {	\
tmp_               57 drivers/gpu/drm/amd/amdgpu/soc15_common.h 			if (old_ != tmp_) {			\
tmp_               59 drivers/gpu/drm/amd/amdgpu/soc15_common.h 				old_ = tmp_;				\
tmp_               62 drivers/gpu/drm/amd/amdgpu/soc15_common.h 			tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
tmp_               66 drivers/gpu/drm/amd/amdgpu/soc15_common.h 					  inst, #reg, (unsigned)expected_value, (unsigned)(tmp_ & (mask))); \
tmp_             2544 drivers/gpu/drm/radeon/radeon.h 		uint32_t tmp_ = RREG32(reg);			\
tmp_             2545 drivers/gpu/drm/radeon/radeon.h 		tmp_ &= (mask);					\
tmp_             2546 drivers/gpu/drm/radeon/radeon.h 		tmp_ |= ((val) & ~(mask));			\
tmp_             2547 drivers/gpu/drm/radeon/radeon.h 		WREG32(reg, tmp_);				\
tmp_             2553 drivers/gpu/drm/radeon/radeon.h 		uint32_t tmp_ = RREG32_PLL(reg);		\
tmp_             2554 drivers/gpu/drm/radeon/radeon.h 		tmp_ &= (mask);					\
tmp_             2555 drivers/gpu/drm/radeon/radeon.h 		tmp_ |= ((val) & ~(mask));			\
tmp_             2556 drivers/gpu/drm/radeon/radeon.h 		WREG32_PLL(reg, tmp_);				\
tmp_             2560 drivers/gpu/drm/radeon/radeon.h 		uint32_t tmp_ = RREG32_SMC(reg);		\
tmp_             2561 drivers/gpu/drm/radeon/radeon.h 		tmp_ &= (mask);					\
tmp_             2562 drivers/gpu/drm/radeon/radeon.h 		tmp_ |= ((val) & ~(mask));			\
tmp_             2563 drivers/gpu/drm/radeon/radeon.h 		WREG32_SMC(reg, tmp_);				\
tmp_             1041 drivers/misc/habanalabs/habanalabs.h 		u32 tmp_ = RREG32(reg);				\
tmp_             1042 drivers/misc/habanalabs/habanalabs.h 		tmp_ &= (mask);					\
tmp_             1043 drivers/misc/habanalabs/habanalabs.h 		tmp_ |= ((val) & ~(mask));			\
tmp_             1044 drivers/misc/habanalabs/habanalabs.h 		WREG32(reg, tmp_);				\