timing_generators 1003 drivers/gpu/drm/amd/display/dc/core/dc.c tg = dc->res_pool->timing_generators[tg_inst]; timing_generators 1214 drivers/gpu/drm/amd/display/dc/core/dc_resource.c split_pipe->stream_res.tg = pool->timing_generators[i]; timing_generators 1616 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->stream_res.tg = pool->timing_generators[i]; timing_generators 1886 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; timing_generators 2749 drivers/gpu/drm/amd/display/dc/core/dc_resource.c struct timing_generator *tg = core_dc->res_pool->timing_generators[0]; timing_generators 701 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c if (pool->base.timing_generators[i] != NULL) { timing_generators 702 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); timing_generators 703 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c pool->base.timing_generators[i] = NULL; timing_generators 1001 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c pool->base.timing_generators[i] = timing_generators 1006 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c if (pool->base.timing_generators[i] == NULL) { timing_generators 1463 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dc->res_pool->timing_generators[i]->funcs->disable_crtc( timing_generators 1464 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dc->res_pool->timing_generators[i]); timing_generators 1503 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c tg = dc->res_pool->timing_generators[i]; timing_generators 2404 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c struct timing_generator *tg = dc->res_pool->timing_generators[i]; timing_generators 758 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c if (pool->base.timing_generators[i] != NULL) { timing_generators 759 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); timing_generators 760 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c pool->base.timing_generators[i] = NULL; timing_generators 1061 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c pipe_ctx->stream_res.tg = pool->timing_generators[underlay_idx]; timing_generators 1193 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c pool->timing_generators[pool->pipe_count] = &dce110_tgv->base; timing_generators 1362 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c pool->base.timing_generators[i] = dce110_timing_generator_create( timing_generators 1364 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c if (pool->base.timing_generators[i] == NULL) { timing_generators 720 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c if (pool->base.timing_generators[i] != NULL) { timing_generators 721 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); timing_generators 722 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c pool->base.timing_generators[i] = NULL; timing_generators 1246 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c pool->base.timing_generators[i] = timing_generators 1251 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c if (pool->base.timing_generators[i] == NULL) { timing_generators 571 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c if (pool->base.timing_generators[i] != NULL) { timing_generators 572 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); timing_generators 573 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c pool->base.timing_generators[i] = NULL; timing_generators 1095 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c pool->base.timing_generators[j] = timing_generators 1100 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c if (pool->base.timing_generators[j] == NULL) { timing_generators 749 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (pool->base.timing_generators[i] != NULL) { timing_generators 750 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); timing_generators 751 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c pool->base.timing_generators[i] = NULL; timing_generators 971 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c pool->base.timing_generators[i] = dce80_timing_generator_create( timing_generators 973 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (pool->base.timing_generators[i] == NULL) { timing_generators 1168 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c pool->base.timing_generators[i] = dce80_timing_generator_create( timing_generators 1170 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (pool->base.timing_generators[i] == NULL) { timing_generators 1361 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c pool->base.timing_generators[i] = dce80_timing_generator_create( timing_generators 1363 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (pool->base.timing_generators[i] == NULL) { timing_generators 315 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct timing_generator *tg = pool->timing_generators[i]; timing_generators 1089 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct timing_generator *tg = dc->res_pool->timing_generators[i]; timing_generators 1126 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct timing_generator *tg = dc->res_pool->timing_generators[i]; timing_generators 427 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c struct timing_generator *tg = pool->timing_generators[i]; timing_generators 494 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c struct timing_generator *tg = pool->timing_generators[i]; timing_generators 925 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (pool->base.timing_generators[i] != NULL) { timing_generators 926 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); timing_generators 927 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c pool->base.timing_generators[i] = NULL; timing_generators 1486 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c pool->base.timing_generators[j] = dcn10_timing_generator_create( timing_generators 1488 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (pool->base.timing_generators[j] == NULL) { timing_generators 1372 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c optc = dc->res_pool->timing_generators[stream_status->primary_otg_inst]; timing_generators 2025 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c struct timing_generator *tg = dc->res_pool->timing_generators[i]; timing_generators 2032 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c struct timing_generator *tg = dc->res_pool->timing_generators[i]; timing_generators 2056 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c struct timing_generator *tg = dc->res_pool->timing_generators[i]; timing_generators 2087 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c struct timing_generator *tg = dc->res_pool->timing_generators[i]; timing_generators 2103 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c struct timing_generator *tg = dc->res_pool->timing_generators[i]; timing_generators 1366 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (pool->base.timing_generators[i] != NULL) { timing_generators 1367 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); timing_generators 1368 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pool->base.timing_generators[i] = NULL; timing_generators 3672 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pool->base.timing_generators[i] = dcn20_timing_generator_create( timing_generators 3674 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (pool->base.timing_generators[i] == NULL) { timing_generators 894 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c if (pool->base.timing_generators[i] != NULL) { timing_generators 895 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); timing_generators 896 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pool->base.timing_generators[i] = NULL; timing_generators 1602 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pool->base.timing_generators[i] = dcn21_timing_generator_create( timing_generators 1604 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c if (pool->base.timing_generators[i] == NULL) { timing_generators 171 drivers/gpu/drm/amd/display/dc/inc/core_types.h struct timing_generator *timing_generators[MAX_PIPES];