timer_parent_names 137 drivers/clk/mmp/clk-of-mmp2.c static const char *timer_parent_names[] = {"clk32", "vctcxo_4", "vctcxo_2", "vctcxo"}; timer_parent_names 150 drivers/clk/mmp/clk-of-mmp2.c {0, "timer_mux", timer_parent_names, ARRAY_SIZE(timer_parent_names), CLK_SET_RATE_PARENT, APBC_TIMER, 4, 3, 0, &timer_lock}, timer_parent_names 126 drivers/clk/mmp/clk-of-pxa168.c static const char *timer_parent_names[] = {"pll1_48", "clk32", "pll1_96", "pll1_192"}; timer_parent_names 139 drivers/clk/mmp/clk-of-pxa168.c {0, "timer_mux", timer_parent_names, ARRAY_SIZE(timer_parent_names), CLK_SET_RATE_PARENT, APBC_TIMER, 4, 3, 0, &timer_lock}, timer_parent_names 124 drivers/clk/mmp/clk-of-pxa910.c static const char *timer_parent_names[] = {"pll1_48", "clk32", "pll1_96"}; timer_parent_names 133 drivers/clk/mmp/clk-of-pxa910.c {0, "timer0_mux", timer_parent_names, ARRAY_SIZE(timer_parent_names), CLK_SET_RATE_PARENT, APBC_TIMER0, 4, 3, 0, &timer0_lock}, timer_parent_names 134 drivers/clk/mmp/clk-of-pxa910.c {0, "timer1_mux", timer_parent_names, ARRAY_SIZE(timer_parent_names), CLK_SET_RATE_PARENT, APBC_TIMER1, 4, 3, 0, &timer1_lock},