timer_clk 336 arch/arm/mach-davinci/time.c void __init davinci_timer_init(struct clk *timer_clk) timer_clk 373 arch/arm/mach-davinci/time.c BUG_ON(IS_ERR(timer_clk)); timer_clk 374 arch/arm/mach-davinci/time.c clk_prepare_enable(timer_clk); timer_clk 379 arch/arm/mach-davinci/time.c davinci_clock_tick_rate = clk_get_rate(timer_clk); timer_clk 182 drivers/clk/actions/owl-s500.c static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0); timer_clk 387 drivers/clk/actions/owl-s500.c &timer_clk.common, timer_clk 442 drivers/clk/actions/owl-s500.c [CLK_TIMER] = &timer_clk.common.hw, timer_clk 218 drivers/clk/actions/owl-s900.c static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0); timer_clk 526 drivers/clk/actions/owl-s900.c &timer_clk.common, timer_clk 619 drivers/clk/actions/owl-s900.c [CLK_TIMER] = &timer_clk.common.hw, timer_clk 20 drivers/clocksource/dw_apb_timer_of.c struct clk *timer_clk; timer_clk 49 drivers/clocksource/dw_apb_timer_of.c timer_clk = of_clk_get_by_name(np, "timer"); timer_clk 50 drivers/clocksource/dw_apb_timer_of.c if (IS_ERR(timer_clk)) timer_clk 53 drivers/clocksource/dw_apb_timer_of.c if (!clk_prepare_enable(timer_clk)) { timer_clk 54 drivers/clocksource/dw_apb_timer_of.c *rate = clk_get_rate(timer_clk); timer_clk 30 drivers/clocksource/ingenic-timer.c struct clk *timer_clk, *cs_clk; timer_clk 116 drivers/clocksource/ingenic-timer.c tcu->timer_clk = ingenic_tcu_get_clock(np, channel); timer_clk 117 drivers/clocksource/ingenic-timer.c if (IS_ERR(tcu->timer_clk)) timer_clk 118 drivers/clocksource/ingenic-timer.c return PTR_ERR(tcu->timer_clk); timer_clk 120 drivers/clocksource/ingenic-timer.c err = clk_prepare_enable(tcu->timer_clk); timer_clk 124 drivers/clocksource/ingenic-timer.c rate = clk_get_rate(tcu->timer_clk); timer_clk 163 drivers/clocksource/ingenic-timer.c clk_disable_unprepare(tcu->timer_clk); timer_clk 165 drivers/clocksource/ingenic-timer.c clk_put(tcu->timer_clk); timer_clk 319 drivers/clocksource/ingenic-timer.c clk_disable(tcu->timer_clk); timer_clk 328 drivers/clocksource/ingenic-timer.c ret = clk_enable(tcu->timer_clk); timer_clk 334 drivers/clocksource/ingenic-timer.c clk_disable(tcu->timer_clk); timer_clk 172 drivers/clocksource/mxs_timer.c static int __init mxs_clockevent_init(struct clk *timer_clk) timer_clk 178 drivers/clocksource/mxs_timer.c clk_get_rate(timer_clk), timer_clk 198 drivers/clocksource/mxs_timer.c static int __init mxs_clocksource_init(struct clk *timer_clk) timer_clk 200 drivers/clocksource/mxs_timer.c unsigned int c = clk_get_rate(timer_clk); timer_clk 215 drivers/clocksource/mxs_timer.c struct clk *timer_clk; timer_clk 221 drivers/clocksource/mxs_timer.c timer_clk = of_clk_get(np, 0); timer_clk 222 drivers/clocksource/mxs_timer.c if (IS_ERR(timer_clk)) { timer_clk 224 drivers/clocksource/mxs_timer.c return PTR_ERR(timer_clk); timer_clk 227 drivers/clocksource/mxs_timer.c ret = clk_prepare_enable(timer_clk); timer_clk 267 drivers/clocksource/mxs_timer.c ret = mxs_clocksource_init(timer_clk); timer_clk 271 drivers/clocksource/mxs_timer.c ret = mxs_clockevent_init(timer_clk); timer_clk 80 drivers/clocksource/timer-armada-370-xp.c static unsigned int timer_clk; timer_clk 197 drivers/clocksource/timer-armada-370-xp.c clockevents_config_and_register(evt, timer_clk, 1, 0xfffffffe); timer_clk 276 drivers/clocksource/timer-armada-370-xp.c ticks_per_jiffy = (timer_clk + HZ / 2) / HZ; timer_clk 289 drivers/clocksource/timer-armada-370-xp.c armada_370_delay_timer.freq = timer_clk; timer_clk 295 drivers/clocksource/timer-armada-370-xp.c sched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk); timer_clk 299 drivers/clocksource/timer-armada-370-xp.c timer_clk, 300, 32, clocksource_mmio_readl_down); timer_clk 350 drivers/clocksource/timer-armada-370-xp.c timer_clk = clk_get_rate(clk); timer_clk 367 drivers/clocksource/timer-armada-370-xp.c timer_clk = clk_get_rate(clk); timer_clk 386 drivers/clocksource/timer-armada-370-xp.c timer_clk = clk_get_rate(clk) / TIMER_DIVIDER; timer_clk 410 drivers/clocksource/timer-armada-370-xp.c timer_clk = clk_get_rate(clk) / TIMER_DIVIDER; timer_clk 130 drivers/clocksource/timer-rockchip.c struct clk *timer_clk; timer_clk 160 drivers/clocksource/timer-rockchip.c timer_clk = of_clk_get_by_name(np, "timer"); timer_clk 161 drivers/clocksource/timer-rockchip.c if (IS_ERR(timer_clk)) { timer_clk 162 drivers/clocksource/timer-rockchip.c ret = PTR_ERR(timer_clk); timer_clk 167 drivers/clocksource/timer-rockchip.c ret = clk_prepare_enable(timer_clk); timer_clk 172 drivers/clocksource/timer-rockchip.c timer->clk = timer_clk; timer_clk 174 drivers/clocksource/timer-rockchip.c timer->freq = clk_get_rate(timer_clk); timer_clk 189 drivers/clocksource/timer-rockchip.c clk_disable_unprepare(timer_clk);