timelines 50 drivers/gpu/drm/i915/gt/intel_gt_types.h } timelines; timelines 791 drivers/gpu/drm/i915/gt/intel_reset.c struct intel_gt_timelines *timelines = >->timelines; timelines 813 drivers/gpu/drm/i915/gt/intel_reset.c spin_lock_irqsave(&timelines->lock, flags); timelines 814 drivers/gpu/drm/i915/gt/intel_reset.c list_for_each_entry(tl, &timelines->active_list, link) { timelines 821 drivers/gpu/drm/i915/gt/intel_reset.c spin_unlock_irqrestore(&timelines->lock, flags); timelines 834 drivers/gpu/drm/i915/gt/intel_reset.c spin_lock_irqsave(&timelines->lock, flags); timelines 835 drivers/gpu/drm/i915/gt/intel_reset.c tl = list_entry(&timelines->active_list, typeof(*tl), link); timelines 837 drivers/gpu/drm/i915/gt/intel_reset.c spin_unlock_irqrestore(&timelines->lock, flags); timelines 56 drivers/gpu/drm/i915/gt/intel_timeline.c struct intel_gt_timelines *gt = &timeline->gt->timelines; timelines 267 drivers/gpu/drm/i915/gt/intel_timeline.c struct intel_gt_timelines *timelines = >->timelines; timelines 269 drivers/gpu/drm/i915/gt/intel_timeline.c spin_lock_init(&timelines->lock); timelines 270 drivers/gpu/drm/i915/gt/intel_timeline.c INIT_LIST_HEAD(&timelines->active_list); timelines 272 drivers/gpu/drm/i915/gt/intel_timeline.c spin_lock_init(&timelines->hwsp_lock); timelines 273 drivers/gpu/drm/i915/gt/intel_timeline.c INIT_LIST_HEAD(&timelines->hwsp_free_list); timelines 339 drivers/gpu/drm/i915/gt/intel_timeline.c struct intel_gt_timelines *timelines = &tl->gt->timelines; timelines 349 drivers/gpu/drm/i915/gt/intel_timeline.c spin_lock_irqsave(&timelines->lock, flags); timelines 350 drivers/gpu/drm/i915/gt/intel_timeline.c list_add(&tl->link, &timelines->active_list); timelines 351 drivers/gpu/drm/i915/gt/intel_timeline.c spin_unlock_irqrestore(&timelines->lock, flags); timelines 356 drivers/gpu/drm/i915/gt/intel_timeline.c struct intel_gt_timelines *timelines = &tl->gt->timelines; timelines 365 drivers/gpu/drm/i915/gt/intel_timeline.c spin_lock_irqsave(&timelines->lock, flags); timelines 367 drivers/gpu/drm/i915/gt/intel_timeline.c spin_unlock_irqrestore(&timelines->lock, flags); timelines 549 drivers/gpu/drm/i915/gt/intel_timeline.c struct intel_gt_timelines *timelines = >->timelines; timelines 551 drivers/gpu/drm/i915/gt/intel_timeline.c GEM_BUG_ON(!list_empty(&timelines->active_list)); timelines 552 drivers/gpu/drm/i915/gt/intel_timeline.c GEM_BUG_ON(!list_empty(&timelines->hwsp_free_list)); timelines 500 drivers/gpu/drm/i915/gt/selftest_timeline.c struct intel_timeline **timelines; timelines 512 drivers/gpu/drm/i915/gt/selftest_timeline.c timelines = kvmalloc_array(NUM_TIMELINES * I915_NUM_ENGINES, timelines 513 drivers/gpu/drm/i915/gt/selftest_timeline.c sizeof(*timelines), timelines 515 drivers/gpu/drm/i915/gt/selftest_timeline.c if (!timelines) timelines 543 drivers/gpu/drm/i915/gt/selftest_timeline.c timelines[count++] = tl; timelines 552 drivers/gpu/drm/i915/gt/selftest_timeline.c struct intel_timeline *tl = timelines[n]; timelines 565 drivers/gpu/drm/i915/gt/selftest_timeline.c kvfree(timelines); timelines 575 drivers/gpu/drm/i915/gt/selftest_timeline.c struct intel_timeline **timelines; timelines 588 drivers/gpu/drm/i915/gt/selftest_timeline.c timelines = kvmalloc_array(NUM_TIMELINES * I915_NUM_ENGINES, timelines 589 drivers/gpu/drm/i915/gt/selftest_timeline.c sizeof(*timelines), timelines 591 drivers/gpu/drm/i915/gt/selftest_timeline.c if (!timelines) timelines 619 drivers/gpu/drm/i915/gt/selftest_timeline.c timelines[count++] = tl; timelines 628 drivers/gpu/drm/i915/gt/selftest_timeline.c struct intel_timeline *tl = timelines[n]; timelines 641 drivers/gpu/drm/i915/gt/selftest_timeline.c kvfree(timelines); timelines 894 drivers/gpu/drm/i915/i915_gem.c struct intel_gt_timelines *timelines = &i915->gt.timelines; timelines 898 drivers/gpu/drm/i915/i915_gem.c spin_lock_irqsave(&timelines->lock, flags); timelines 899 drivers/gpu/drm/i915/i915_gem.c list_for_each_entry(tl, &timelines->active_list, link) { timelines 906 drivers/gpu/drm/i915/i915_gem.c spin_unlock_irqrestore(&timelines->lock, flags); timelines 926 drivers/gpu/drm/i915/i915_gem.c spin_lock_irqsave(&timelines->lock, flags); timelines 927 drivers/gpu/drm/i915/i915_gem.c tl = list_entry(&timelines->active_list, typeof(*tl), link); timelines 929 drivers/gpu/drm/i915/i915_gem.c spin_unlock_irqrestore(&timelines->lock, flags); timelines 1519 drivers/gpu/drm/i915/i915_request.c struct intel_gt_timelines *timelines = &i915->gt.timelines; timelines 1524 drivers/gpu/drm/i915/i915_request.c spin_lock_irqsave(&timelines->lock, flags); timelines 1525 drivers/gpu/drm/i915/i915_request.c list_for_each_entry_safe(tl, tn, &timelines->active_list, link) { timelines 1532 drivers/gpu/drm/i915/i915_request.c spin_unlock_irqrestore(&timelines->lock, flags); timelines 1536 drivers/gpu/drm/i915/i915_request.c spin_lock_irqsave(&timelines->lock, flags); timelines 1551 drivers/gpu/drm/i915/i915_request.c spin_unlock_irqrestore(&timelines->lock, flags); timelines 1556 drivers/gpu/drm/i915/i915_request.c return !list_empty(&timelines->active_list); timelines 18 drivers/gpu/drm/i915/selftests/i915_mock_selftests.h selftest(timelines, intel_timeline_mock_selftests) timelines 41 tools/testing/selftests/sync/sync_stress_merge.c int timelines[timeline_count]; timelines 49 tools/testing/selftests/sync/sync_stress_merge.c timelines[i] = sw_sync_timeline_create(); timelines 51 tools/testing/selftests/sync/sync_stress_merge.c fence = sw_sync_fence_create(timelines[0], "fence", 0); timelines 65 tools/testing/selftests/sync/sync_stress_merge.c timeline = timelines[timeline_offset]; timelines 101 tools/testing/selftests/sync/sync_stress_merge.c sw_sync_timeline_inc(timelines[i], fence_map[i]); timelines 112 tools/testing/selftests/sync/sync_stress_merge.c sw_sync_timeline_destroy(timelines[i]);