tim2               90 arch/arm/mach-integrator/impd1.c 	.tim2		= TIM2_BCD | TIM2_IPC,
tim2              118 arch/arm/mach-integrator/impd1.c 	.tim2		= TIM2_BCD,
tim2              146 arch/arm/mach-integrator/impd1.c 	.tim2		= TIM2_BCD,
tim2              178 arch/arm/mach-integrator/impd1.c 	.tim2		= TIM2_BCD,
tim2              135 drivers/gpu/drm/pl111/pl111_display.c 	u32 cpl, tim2;
tim2              172 drivers/gpu/drm/pl111/pl111_display.c 	tim2 = readl(priv->regs + CLCD_TIM2);
tim2              173 drivers/gpu/drm/pl111/pl111_display.c 	tim2 &= (TIM2_BCD | TIM2_PCD_LO_MASK | TIM2_PCD_HI_MASK);
tim2              176 drivers/gpu/drm/pl111/pl111_display.c 		tim2 |= TIM2_BCD;
tim2              179 drivers/gpu/drm/pl111/pl111_display.c 		tim2 |= TIM2_IHS;
tim2              182 drivers/gpu/drm/pl111/pl111_display.c 		tim2 |= TIM2_IVS;
tim2              186 drivers/gpu/drm/pl111/pl111_display.c 			tim2 |= TIM2_IOE;
tim2              190 drivers/gpu/drm/pl111/pl111_display.c 			tim2 |= TIM2_IPC;
tim2              204 drivers/gpu/drm/pl111/pl111_display.c 			tim2 |= TIM2_ACB_MASK;
tim2              227 drivers/gpu/drm/pl111/pl111_display.c 			tim2 ^= TIM2_IPC;
tim2              230 drivers/gpu/drm/pl111/pl111_display.c 	tim2 |= cpl << 16;
tim2              231 drivers/gpu/drm/pl111/pl111_display.c 	writel(tim2, priv->regs + CLCD_TIM2);
tim2              490 drivers/gpu/drm/pl111/pl111_display.c 	u32 tim2 = readl(priv->regs + CLCD_TIM2);
tim2              493 drivers/gpu/drm/pl111/pl111_display.c 	if (tim2 & TIM2_BCD)
tim2              496 drivers/gpu/drm/pl111/pl111_display.c 	div = tim2 & TIM2_PCD_LO_MASK;
tim2              497 drivers/gpu/drm/pl111/pl111_display.c 	div |= (tim2 & TIM2_PCD_HI_MASK) >>
tim2              510 drivers/gpu/drm/pl111/pl111_display.c 	u32 tim2;
tim2              513 drivers/gpu/drm/pl111/pl111_display.c 	tim2 = readl(priv->regs + CLCD_TIM2);
tim2              514 drivers/gpu/drm/pl111/pl111_display.c 	tim2 &= ~(TIM2_BCD | TIM2_PCD_LO_MASK | TIM2_PCD_HI_MASK);
tim2              517 drivers/gpu/drm/pl111/pl111_display.c 		tim2 |= TIM2_BCD;
tim2              520 drivers/gpu/drm/pl111/pl111_display.c 		tim2 |= div & TIM2_PCD_LO_MASK;
tim2              521 drivers/gpu/drm/pl111/pl111_display.c 		tim2 |= (div >> TIM2_PCD_LO_BITS) << TIM2_PCD_HI_SHIFT;
tim2              524 drivers/gpu/drm/pl111/pl111_display.c 	writel(tim2, priv->regs + CLCD_TIM2);
tim2              509 drivers/memory/emif.c 	u32 tim2 = 0, val = 0;
tim2              512 drivers/memory/emif.c 	tim2 |= val << T_CKE_SHIFT;
tim2              515 drivers/memory/emif.c 	tim2 |= val << T_RTP_SHIFT;
tim2              519 drivers/memory/emif.c 	tim2 |= val << T_XSNR_SHIFT;
tim2              522 drivers/memory/emif.c 	tim2 |= val << T_XSRD_SHIFT;
tim2              525 drivers/memory/emif.c 	tim2 |= val << T_XP_SHIFT;
tim2              527 drivers/memory/emif.c 	return tim2;
tim2              531 drivers/staging/comedi/drivers/adl_pci9118.c 				  unsigned int *tim1, unsigned int *tim2,
tim2              539 drivers/staging/comedi/drivers/adl_pci9118.c 	*div1 = *tim2 / pacer->osc_base;	/* convert timer (burst) */
tim2              545 drivers/staging/comedi/drivers/adl_pci9118.c 	*tim2 = *div1 * pacer->osc_base;	/* real convert timer */
tim2              311 drivers/video/fbdev/amba-clcd.c 	writel(regs.tim2, fb->regs + CLCD_TIM2);
tim2              577 drivers/video/fbdev/amba-clcd.c 		clcd_panel->tim2 |= TIM2_IPC;
tim2              585 drivers/video/fbdev/amba-clcd.c 		clcd_panel->tim2 |= TIM2_IPC;
tim2              588 drivers/video/fbdev/amba-clcd.c 		clcd_panel->tim2 |= TIM2_IHS;
tim2              591 drivers/video/fbdev/amba-clcd.c 		clcd_panel->tim2 |= TIM2_IVS;
tim2              594 drivers/video/fbdev/amba-clcd.c 		clcd_panel->tim2 |= TIM2_IOE;
tim2              670 drivers/video/fbdev/amba-clcd.c 	fb->panel->tim2 |= TIM2_BCD;
tim2               47 include/linux/amba/clcd.h 	u32			tim2;
tim2               67 include/linux/amba/clcd.h 	u32			tim2;
tim2              166 include/linux/amba/clcd.h 	val = fb->panel->tim2;
tim2              180 include/linux/amba/clcd.h 	regs->tim2 = val | ((cpl - 1) << 16);