tiling_format     873 drivers/gpu/drm/vc4/vc4_drv.h 			uint32_t offset, uint8_t tiling_format,
tiling_format     160 drivers/gpu/drm/vc4/vc4_validate.c 		   uint32_t offset, uint8_t tiling_format,
tiling_format     180 drivers/gpu/drm/vc4/vc4_validate.c 	switch (tiling_format) {
tiling_format     194 drivers/gpu/drm/vc4/vc4_validate.c 		DRM_DEBUG("buffer tiling %d unsupported\n", tiling_format);
tiling_format     578 drivers/gpu/drm/vc4/vc4_validate.c 	uint32_t cpp, tiling_format, utile_w, utile_h;
tiling_format     670 drivers/gpu/drm/vc4/vc4_validate.c 		tiling_format = VC4_TILING_FORMAT_LINEAR;
tiling_format     673 drivers/gpu/drm/vc4/vc4_validate.c 			tiling_format = VC4_TILING_FORMAT_LT;
tiling_format     675 drivers/gpu/drm/vc4/vc4_validate.c 			tiling_format = VC4_TILING_FORMAT_T;
tiling_format     679 drivers/gpu/drm/vc4/vc4_validate.c 				tiling_format, width, height, cpp)) {
tiling_format     693 drivers/gpu/drm/vc4/vc4_validate.c 		if (tiling_format == VC4_TILING_FORMAT_T &&
tiling_format     695 drivers/gpu/drm/vc4/vc4_validate.c 			tiling_format = VC4_TILING_FORMAT_LT;
tiling_format     698 drivers/gpu/drm/vc4/vc4_validate.c 		switch (tiling_format) {