tile_height      1954 drivers/gpu/drm/i915/display/intel_display.c 			    unsigned int *tile_height)
tile_height      1960 drivers/gpu/drm/i915/display/intel_display.c 	*tile_height = intel_tile_size(to_i915(fb->dev)) / tile_width_bytes;
tile_height      1967 drivers/gpu/drm/i915/display/intel_display.c 	unsigned int tile_height = intel_tile_height(fb, color_plane);
tile_height      1969 drivers/gpu/drm/i915/display/intel_display.c 	return ALIGN(height, tile_height);
tile_height      2217 drivers/gpu/drm/i915/display/intel_display.c 				    unsigned int tile_height,
tile_height      2232 drivers/gpu/drm/i915/display/intel_display.c 	*y += tiles / pitch_tiles * tile_height;
tile_height      2236 drivers/gpu/drm/i915/display/intel_display.c 	*y += *x / pitch_pixels * tile_height;
tile_height      2260 drivers/gpu/drm/i915/display/intel_display.c 		unsigned int tile_size, tile_width, tile_height;
tile_height      2264 drivers/gpu/drm/i915/display/intel_display.c 		intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
tile_height      2267 drivers/gpu/drm/i915/display/intel_display.c 			pitch_tiles = pitch / tile_height;
tile_height      2268 drivers/gpu/drm/i915/display/intel_display.c 			swap(tile_width, tile_height);
tile_height      2273 drivers/gpu/drm/i915/display/intel_display.c 		intel_adjust_tile_offset(x, y, tile_width, tile_height,
tile_height      2330 drivers/gpu/drm/i915/display/intel_display.c 		unsigned int tile_size, tile_width, tile_height;
tile_height      2334 drivers/gpu/drm/i915/display/intel_display.c 		intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
tile_height      2337 drivers/gpu/drm/i915/display/intel_display.c 			pitch_tiles = pitch / tile_height;
tile_height      2338 drivers/gpu/drm/i915/display/intel_display.c 			swap(tile_width, tile_height);
tile_height      2343 drivers/gpu/drm/i915/display/intel_display.c 		tile_rows = *y / tile_height;
tile_height      2344 drivers/gpu/drm/i915/display/intel_display.c 		*y %= tile_height;
tile_height      2352 drivers/gpu/drm/i915/display/intel_display.c 		intel_adjust_tile_offset(x, y, tile_width, tile_height,
tile_height      2660 drivers/gpu/drm/i915/display/intel_display.c 			int tile_width, tile_height;
tile_height      2664 drivers/gpu/drm/i915/display/intel_display.c 			intel_tile_dims(fb, i, &tile_width, &tile_height);
tile_height      2666 drivers/gpu/drm/i915/display/intel_display.c 			tile_height *= vsub;
tile_height      2669 drivers/gpu/drm/i915/display/intel_display.c 			ccs_y = (y * vsub) % tile_height;
tile_height      2671 drivers/gpu/drm/i915/display/intel_display.c 			main_y = intel_fb->normal[0].y % tile_height;
tile_height      2718 drivers/gpu/drm/i915/display/intel_display.c 			unsigned int tile_width, tile_height;
tile_height      2722 drivers/gpu/drm/i915/display/intel_display.c 			intel_tile_dims(fb, i, &tile_width, &tile_height);
tile_height      2727 drivers/gpu/drm/i915/display/intel_display.c 			rot_info->plane[i].height = DIV_ROUND_UP(y + height, tile_height);
tile_height      2730 drivers/gpu/drm/i915/display/intel_display.c 				rot_info->plane[i].height * tile_height;
tile_height      2748 drivers/gpu/drm/i915/display/intel_display.c 					rot_info->plane[i].height * tile_height,
tile_height      2754 drivers/gpu/drm/i915/display/intel_display.c 			pitch_tiles = intel_fb->rotated[i].pitch / tile_height;
tile_height      2755 drivers/gpu/drm/i915/display/intel_display.c 			swap(tile_width, tile_height);
tile_height      2762 drivers/gpu/drm/i915/display/intel_display.c 						 tile_width, tile_height,
tile_height      2832 drivers/gpu/drm/i915/display/intel_display.c 		unsigned int tile_width, tile_height;
tile_height      2838 drivers/gpu/drm/i915/display/intel_display.c 		intel_tile_dims(fb, i, &tile_width, &tile_height);
tile_height      2861 drivers/gpu/drm/i915/display/intel_display.c 		info->plane[i].height = DIV_ROUND_UP(y + height, tile_height);
tile_height      2873 drivers/gpu/drm/i915/display/intel_display.c 					info->plane[i].height * tile_height,
tile_height      2879 drivers/gpu/drm/i915/display/intel_display.c 			plane_state->color_plane[i].stride = pitch_tiles * tile_height;
tile_height      2882 drivers/gpu/drm/i915/display/intel_display.c 			swap(tile_width, tile_height);
tile_height      2893 drivers/gpu/drm/i915/display/intel_display.c 					 tile_width, tile_height,
tile_height       213 drivers/gpu/drm/i915/gvt/dmabuf.c 	int ret, tile_height = 1;
tile_height       234 drivers/gpu/drm/i915/gvt/dmabuf.c 			tile_height = 8;
tile_height       238 drivers/gpu/drm/i915/gvt/dmabuf.c 			tile_height = 32;
tile_height       242 drivers/gpu/drm/i915/gvt/dmabuf.c 			tile_height = 32;
tile_height       273 drivers/gpu/drm/i915/gvt/dmabuf.c 	info->size = info->stride * roundup(info->height, tile_height);
tile_height        49 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.tile_height = DPU_TILE_HEIGHT_DEFAULT                            \
tile_height        68 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.tile_height = th                                                 \
tile_height        88 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.tile_height = DPU_TILE_HEIGHT_DEFAULT                            \
tile_height       106 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.tile_height = DPU_TILE_HEIGHT_DEFAULT                            \
tile_height       125 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.tile_height = th                                                 \
tile_height       143 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.tile_height = DPU_TILE_HEIGHT_DEFAULT                            \
tile_height       162 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.tile_height = th                                                 \
tile_height       182 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.tile_height = DPU_TILE_HEIGHT_DEFAULT                            \
tile_height       366 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h 	u16 tile_height;
tile_height       655 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			if (fmt[i]->tile_height > max_tile_height)
tile_height       656 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 				max_tile_height = fmt[i]->tile_height;
tile_height       256 drivers/gpu/drm/radeon/r600_cs.c 	u32 tile_height = 8;
tile_height       259 drivers/gpu/drm/radeon/r600_cs.c 	u32 tile_bytes = tile_width * tile_height * values->blocksize * values->nsamples;
tile_height       279 drivers/gpu/drm/radeon/r600_cs.c 					 (tile_height * values->blocksize * values->nsamples)));
tile_height       280 drivers/gpu/drm/radeon/r600_cs.c 		*height_align = tile_height;
tile_height       288 drivers/gpu/drm/radeon/r600_cs.c 		*height_align = macro_tile_height * tile_height;
tile_height       509 drivers/staging/media/allegro-dvt/allegro-core.c 	s32 tile_height[22];