thrs               97 drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c 				   const struct nvbios_therm_threshold *thrs,
thrs              109 drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c 	if (temp == thrs->temp) {
thrs              110 drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c 		nvkm_wr32(device, thrs_reg, thrs->temp - thrs->hysteresis);
thrs              113 drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c 		nvkm_wr32(device, thrs_reg, thrs->temp);
thrs              119 drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c 	if (new_state == NVKM_THERM_THRS_LOWER && cur > thrs->temp)
thrs              122 drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c 		cur < thrs->temp - thrs->hysteresis)
thrs               59 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 				      enum nvkm_therm_thrs thrs,
thrs               62 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 	therm->sensor.alarm_state[thrs] = st;
thrs               68 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 				      enum nvkm_therm_thrs thrs)
thrs               70 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 	return therm->sensor.alarm_state[thrs];
thrs               81 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c nvkm_therm_sensor_event(struct nvkm_therm *therm, enum nvkm_therm_thrs thrs,
thrs               91 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 	if (thrs < 0 || thrs > 3)
thrs               97 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 			  temperature, thresholds[thrs]);
thrs              100 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 			  temperature, thresholds[thrs]);
thrs              103 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 	switch (thrs) {
thrs              138 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 				  const struct nvbios_therm_threshold *thrs,
thrs              147 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 	if (temp >= thrs->temp && prev_state == NVKM_THERM_THRS_LOWER) {
thrs              150 drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c 	} else if (temp <= thrs->temp - thrs->hysteresis &&
thrs              631 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c 			    tnr_dmd->lna_thrs_tbl_air->thrs[idx].off_on;
thrs              633 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c 			    tnr_dmd->lna_thrs_tbl_air->thrs[idx].on_off;
thrs              663 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c 			    tnr_dmd->lna_thrs_tbl_cable->thrs[idx].off_on;
thrs              665 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c 			    tnr_dmd->lna_thrs_tbl_cable->thrs[idx].on_off;
thrs              176 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.h 	struct cxd2880_tnrdmd_lna_thrs thrs[24];
thrs              180 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.h 	struct cxd2880_tnrdmd_lna_thrs thrs[32];
thrs             5549 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	int port, size, thrs;
thrs             5554 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			thrs = MVPP2_TX_FIFO_THRESHOLD_10KB;
thrs             5557 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			thrs = MVPP2_TX_FIFO_THRESHOLD_3KB;
thrs             5560 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		mvpp2_write(priv, MVPP22_TX_FIFO_THRESH_REG(port), thrs);