thres 881 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t thres:6; thres 893 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t thres:6; thres 1374 drivers/crypto/chelsio/chtls/chtls_io.c u32 thres; thres 1376 drivers/crypto/chelsio/chtls/chtls_io.c thres = 15 * 1024; thres 1393 drivers/crypto/chelsio/chtls/chtls_io.c if (must_send || credits >= thres) thres 133 drivers/i2c/busses/i2c-xlp9xx.c u32 thres; thres 139 drivers/i2c/busses/i2c-xlp9xx.c thres = 1; thres 141 drivers/i2c/busses/i2c-xlp9xx.c thres = XLP9XX_I2C_FIFO_SIZE; thres 143 drivers/i2c/busses/i2c-xlp9xx.c thres = priv->msg_buf_remaining; thres 146 drivers/i2c/busses/i2c-xlp9xx.c thres << XLP9XX_I2C_MFIFOCTRL_HITH_SHIFT); thres 654 drivers/iio/adc/palmas_gpadc.c int thres; thres 681 drivers/iio/adc/palmas_gpadc.c thres = adc->wakeup1_data.adc_high_threshold; thres 684 drivers/iio/adc/palmas_gpadc.c thres = adc->wakeup1_data.adc_low_threshold; thres 689 drivers/iio/adc/palmas_gpadc.c PALMAS_GPADC_THRES_CONV0_LSB, thres & 0xFF); thres 698 drivers/iio/adc/palmas_gpadc.c ((thres >> 8) & 0xF) | polarity); thres 712 drivers/iio/adc/palmas_gpadc.c thres = adc->wakeup2_data.adc_high_threshold; thres 715 drivers/iio/adc/palmas_gpadc.c thres = adc->wakeup2_data.adc_low_threshold; thres 720 drivers/iio/adc/palmas_gpadc.c PALMAS_GPADC_THRES_CONV1_LSB, thres & 0xFF); thres 729 drivers/iio/adc/palmas_gpadc.c ((thres >> 8) & 0xF) | polarity); thres 10086 drivers/infiniband/hw/hfi1/chip.c u32 thres; thres 10105 drivers/infiniband/hw/hfi1/chip.c thres = min(sc_percent_to_threshold(dd->vld[i].sc, 50), thres 10112 drivers/infiniband/hw/hfi1/chip.c thres); thres 10114 drivers/infiniband/hw/hfi1/chip.c thres = min(sc_percent_to_threshold(dd->vld[15].sc, 50), thres 10118 drivers/infiniband/hw/hfi1/chip.c sc_set_cr_threshold(dd->vld[15].sc, thres); thres 1875 drivers/infiniband/hw/hfi1/pio.c u32 thres; thres 1877 drivers/infiniband/hw/hfi1/pio.c thres = min(sc_percent_to_threshold(dd->kernel_send_context[scontext], thres 1882 drivers/infiniband/hw/hfi1/pio.c sc_set_cr_threshold(dd->kernel_send_context[scontext], thres); thres 228 drivers/input/misc/bma150.c u8 enable, u8 hyst, u8 dur, u8 thres) thres 242 drivers/input/misc/bma150.c error = bma150_write_byte(bma150->client, BMA150_LOW_G_THRES_REG, thres); thres 252 drivers/input/misc/bma150.c u8 enable, u8 hyst, u8 dur, u8 thres) thres 268 drivers/input/misc/bma150.c BMA150_HIGH_G_THRES_REG, thres); thres 279 drivers/input/misc/bma150.c u8 enable, u8 dur, u8 thres) thres 291 drivers/input/misc/bma150.c BMA150_ANY_MOTION_THRES_REG, thres); thres 1577 drivers/media/dvb-frontends/drx39xyj/drx_driver.h u16 thres; /* carrier detetcion threshold for primary carrier (A) */ thres 206 drivers/media/platform/omap3isp/isppreview.c (hmed->thres << ISPPRV_HMED_THRESHOLD_SHIFT), thres 276 drivers/media/platform/omap3isp/isppreview.c cs->gain | (cs->thres << ISPPRV_CSUP_THRES_SHIFT) | thres 1321 drivers/media/platform/omap3isp/isppreview.c params->csup.thres = FLR_CSUP_THRES; thres 896 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_scs_threshold *thres = prop_data; thres 899 drivers/media/platform/qcom/venus/hfi_cmds.c thres->threshold_value = *in; thres 900 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*thres); thres 250 drivers/misc/apds990x.c u32 thres; thres 280 drivers/misc/apds990x.c thres = lux * cpl / 64; thres 295 drivers/misc/apds990x.c thres = (chip->rcf.cf1 * thres + chip->rcf.irf1 * ir) / thres 298 drivers/misc/apds990x.c thres = (chip->rcf.cf2 * thres + chip->rcf.irf2 * ir) / thres 301 drivers/misc/apds990x.c if (thres >= chip->a_max_result) thres 302 drivers/misc/apds990x.c thres = chip->a_max_result - 1; thres 303 drivers/misc/apds990x.c return thres; thres 349 drivers/net/ethernet/chelsio/cxgb3/xgmac.c unsigned int thres, v, reg; thres 407 drivers/net/ethernet/chelsio/cxgb3/xgmac.c thres = (adap->params.vpd.cclk * 1000) / 15625; thres 408 drivers/net/ethernet/chelsio/cxgb3/xgmac.c thres = (thres * mtu) / 1000; thres 410 drivers/net/ethernet/chelsio/cxgb3/xgmac.c thres /= 10; thres 411 drivers/net/ethernet/chelsio/cxgb3/xgmac.c thres = mtu > thres ? (mtu - thres + 7) / 8 : 0; thres 412 drivers/net/ethernet/chelsio/cxgb3/xgmac.c thres = max(thres, 8U); /* need at least 8 */ thres 416 drivers/net/ethernet/chelsio/cxgb3/xgmac.c V_TXFIFOTHRESH(thres) | V_TXIPG(ipg)); thres 28 drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h u16 thres[CIM_NUM_IBQ]; thres 560 drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c cim_qcfg_data->thres); thres 1721 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); thres 338 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c u16 thres[CIM_NUM_IBQ]; thres 362 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c t4_read_cimq_cfg(adap, base, size, thres); thres 368 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c qname[i], base[i], size[i], thres[i], thres 1123 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c static int closest_thres(const struct sge *s, int thres) thres 1128 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c delta = thres - s->counter_val[i]; thres 9720 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres) thres 9733 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c *thres++ = QUEFULLTHRSH_G(v) * 8; /* 8-byte unit */ thres 1037 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static int closest_thres(const struct sge *s, int thres) thres 1042 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c delta = thres - s->counter_val[i]; thres 908 drivers/net/ethernet/mellanox/mlxsw/spectrum.c static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int index, u16 size, u16 thres, thres 915 drivers/net/ethernet/mellanox/mlxsw/spectrum.c thres); thres 579 include/soc/fsl/qman.h int thres = be16_to_cpu(th->word); thres 581 include/soc/fsl/qman.h return ((thres >> 5) & 0xff) << (thres & 0x1f); thres 479 include/uapi/linux/omap3isp.h __u8 thres; thres 516 include/uapi/linux/omap3isp.h __u8 thres;