the 80 arch/arc/include/asm/entry-arcv2.h ; (B) Manually save the complete reg file below the 142 arch/arc/include/asm/entry-arcv2.h ; Saving pt_regs->sp correctly requires some extra work due to the way the 145 arch/arc/include/asm/entry-arcv2.h ; - K mode: add the offset from current SP where H/w starts auto push the 147 arch/arc/include/asm/entry-arcv2.h ; 1. Utilize the fact that Z bit is set if Intr taken in U mode the 224 arch/arc/include/asm/entry-arcv2.h ; _SOFT clobbers r10 restored by _HARD hence the order the 390 arch/arm/include/asm/assembler.h @ explicit IT instruction needed because of the label the 391 arch/arm/include/asm/assembler.h @ introduced by the USER macro the 402 arch/arm/include/asm/assembler.h @ Slightly optimised to avoid incrementing the pointer twice the 14 arch/arm/include/asm/tls.h mrc p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register the 16 arch/arm/include/asm/tls.h mcr p15, 0, \tpuser, c13, c0, 2 @ and the user r/w register the 26 arch/arm/include/asm/tls.h mrcne p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register the 20 arch/arm/include/asm/vfpmacros.h @ read all the working registers back into the VFP the 44 arch/arm/include/asm/vfpmacros.h @ write all the working registers out of the VFP the 8 arch/m68k/fpsp040/fpsp.h | For details on the license for this file, please see the the 13 arch/m68k/fpsp040/fpsp.h | These equates are used to access the exception frame, the fsave the 14 arch/m68k/fpsp040/fpsp.h | frame and any local variables needed by the FPSP package. the 24 arch/m68k/fpsp040/fpsp.h | After initialization, the stack looks like this: the 44 arch/m68k/fpsp040/fpsp.h | Positive offsets from A6 refer to the exception frame. Negative the 45 arch/m68k/fpsp040/fpsp.h | offsets refer to the Local Variable area and the fsave area. the 46 arch/m68k/fpsp040/fpsp.h | The fsave frame is also accessible from the top via A7. the 48 arch/m68k/fpsp040/fpsp.h | On exit, the handlers execute: the 56 arch/m68k/fpsp040/fpsp.h | and then either "bra fpsp_done" if the exception was completely the 57 arch/m68k/fpsp040/fpsp.h | handled by the package, or "bra real_xxxx" which is an external the 58 arch/m68k/fpsp040/fpsp.h | label to a routine that will process a real exception of the the 59 arch/m68k/fpsp040/fpsp.h | type that was generated. Some handlers may omit the "frestore" the 60 arch/m68k/fpsp040/fpsp.h | if the FPU state after the exception is idle. the 62 arch/m68k/fpsp040/fpsp.h | Sometimes the exception handler will transform the fsave area the 63 arch/m68k/fpsp040/fpsp.h | because it needs to report an exception back to the user. This the 64 arch/m68k/fpsp040/fpsp.h | can happen if the package is entered for an unimplemented float the 66 arch/m68k/fpsp040/fpsp.h | a second fsave frame can be pushed onto the stack and the the 67 arch/m68k/fpsp040/fpsp.h | handler exit code will reload the new frame and discard the old. the 70 arch/m68k/fpsp040/fpsp.h | restored from the "local variable" area and can be used as the 72 arch/m68k/fpsp040/fpsp.h | of these registers, it should modify the saved copy and let the 73 arch/m68k/fpsp040/fpsp.h | the handler exit code restore the value. the 77 arch/m68k/fpsp040/fpsp.h | Local Variables on the stack the 124 arch/m68k/fpsp040/fpsp.h | Offsets are defined from the end of an fsave because the last 10 the 125 arch/m68k/fpsp040/fpsp.h | words of a busy frame are the same as the unimplemented frame. the 266 arch/m68k/fpsp040/fpsp.h | FPSR combinations used in the FPSP the 325 arch/m68k/fpsp040/fpsp.h | are in the $40s {$40-$4f} the 8321 arch/m68k/ifpsp060/src/fplsp.S # if the input is exactly equal to one, then exit through ld_pzero. the 10213 arch/m68k/ifpsp060/src/fplsp.S # if enabled so the operating system can log the event. # the 965 arch/m68k/ifpsp060/src/fpsp.S # if our emulation, after re-doing the operation, decided that the 998 arch/m68k/ifpsp060/src/fpsp.S # if our emulation, after re-doing the operation, decided that the 1220 arch/m68k/ifpsp060/src/fpsp.S # if the exception is an opclass zero or two unimplemented data type the 1621 arch/m68k/ifpsp060/src/fpsp.S # if a disabled overflow occurred and inexact was enabled but the result the 1725 arch/m68k/ifpsp060/src/fpsp.S # if the exception occurred from supervisor mode, check if the 3294 arch/m68k/ifpsp060/src/fpsp.S # if the effective addressing mode was -() or ()+, then the address # the 3857 arch/m68k/ifpsp060/src/fpsp.S # if the F-Line instruction is an "fmovecr" w/ a non-zero <ea>. if the 4143 arch/m68k/ifpsp060/src/fpsp.S # if the instruction was executed from supervisor mode and the addressing the 8427 arch/m68k/ifpsp060/src/fpsp.S # if the input is exactly equal to one, then exit through ld_pzero. the 11815 arch/m68k/ifpsp060/src/fpsp.S # if the rnd mode is anything but RZ, then we have to re-do the above the 12044 arch/m68k/ifpsp060/src/fpsp.S # if the result would have overflowed/underflowed. If so, use unf_res() # the 12203 arch/m68k/ifpsp060/src/fpsp.S # if underflow or inexact is enabled, then go calculate the EXOP first. the 14840 arch/m68k/ifpsp060/src/fpsp.S # if the precision is extended, this result could not have come from an the 15293 arch/m68k/ifpsp060/src/fpsp.S # if the precision is extended, this result could not have come from an the 16332 arch/m68k/ifpsp060/src/fpsp.S # if the NAN bit is set, in which case BSUN and AIOP will be set. # the 16960 arch/m68k/ifpsp060/src/fpsp.S # if the NAN bit is set, in which case BSUN and AIOP will be set. # the 17530 arch/m68k/ifpsp060/src/fpsp.S # if the NAN bit is set, in which case BSUN and AIOP will be set. # the 18080 arch/m68k/ifpsp060/src/fpsp.S # if the addressing mode is post-increment or pre-decrement, the 18235 arch/m68k/ifpsp060/src/fpsp.S # if the bit string is a zero, then the operation is a no-op the 19600 arch/m68k/ifpsp060/src/fpsp.S # if an immediate data access fails, the resulting fault status # the 19789 arch/m68k/ifpsp060/src/fpsp.S # if the ea is -() or ()+, need to know # of bytes. # the 21004 arch/m68k/ifpsp060/src/fpsp.S # if the mantissa is zero, I will zero the exponent, too. the 23022 arch/m68k/ifpsp060/src/fpsp.S # if negative, count the trailing zeros. Set the adjusted # the 23193 arch/m68k/ifpsp060/src/fpsp.S # if the exp was positive, and added if it was negative. The purpose the 23499 arch/m68k/ifpsp060/src/fpsp.S # if it is a positive number, or the number of digits # the 24713 arch/m68k/ifpsp060/src/fpsp.S # if the effective addressing mode was predecrement or postincrement, the 221 arch/m68k/ifpsp060/src/ilsp.S # if the register numbers are the same, only the quotient gets saved. the 283 arch/m68k/ifpsp060/src/ilsp.S # if the divisor msw is 0, use simpler algorithm then the full blown the 964 arch/m68k/ifpsp060/src/pfpsp.S # if our emulation, after re-doing the operation, decided that the 997 arch/m68k/ifpsp060/src/pfpsp.S # if our emulation, after re-doing the operation, decided that the 1219 arch/m68k/ifpsp060/src/pfpsp.S # if the exception is an opclass zero or two unimplemented data type the 1620 arch/m68k/ifpsp060/src/pfpsp.S # if a disabled overflow occurred and inexact was enabled but the result the 1724 arch/m68k/ifpsp060/src/pfpsp.S # if the exception occurred from supervisor mode, check if the 3293 arch/m68k/ifpsp060/src/pfpsp.S # if the effective addressing mode was -() or ()+, then the address # the 4284 arch/m68k/ifpsp060/src/pfpsp.S # if the bit string is a zero, then the operation is a no-op the 7905 arch/m68k/ifpsp060/src/pfpsp.S # if the mantissa is zero, I will zero the exponent, too. the 8246 arch/m68k/ifpsp060/src/pfpsp.S # if the rnd mode is anything but RZ, then we have to re-do the above the 8475 arch/m68k/ifpsp060/src/pfpsp.S # if the result would have overflowed/underflowed. If so, use unf_res() # the 8634 arch/m68k/ifpsp060/src/pfpsp.S # if underflow or inexact is enabled, then go calculate the EXOP first. the 11271 arch/m68k/ifpsp060/src/pfpsp.S # if the precision is extended, this result could not have come from an the 11724 arch/m68k/ifpsp060/src/pfpsp.S # if the precision is extended, this result could not have come from an the 12982 arch/m68k/ifpsp060/src/pfpsp.S # if negative, count the trailing zeros. Set the adjusted # the 13153 arch/m68k/ifpsp060/src/pfpsp.S # if the exp was positive, and added if it was negative. The purpose the 13459 arch/m68k/ifpsp060/src/pfpsp.S # if it is a positive number, or the number of digits # the 14673 arch/m68k/ifpsp060/src/pfpsp.S # if the effective addressing mode was predecrement or postincrement, the 70 arch/m68k/math-emu/fp_decode.h | first decoding of the instr type the 71 arch/m68k/math-emu/fp_decode.h | this separates the conditional instr the 82 arch/m68k/math-emu/fp_decode.h | second decoding of the instr type the 96 arch/m68k/math-emu/fp_decode.h | extract the source specifier, specifies the 112 arch/m68k/math-emu/fp_decode.h | extract the addressing mode the 113 arch/m68k/math-emu/fp_decode.h | it depends on the instr which of the modes is valid the 128 arch/m68k/math-emu/fp_decode.h | extract the register for the addressing mode the 133 arch/m68k/math-emu/fp_decode.h | decode the 8bit displacement from the brief extension word the 139 arch/m68k/math-emu/fp_decode.h | decode the index of the brief/full extension word the 141 arch/m68k/math-emu/fp_decode.h bfextu %d2{#17,#3},%d0 | get the register nr the 167 arch/m68k/math-emu/fp_decode.h | decode the base displacement size the 188 arch/m68k/math-emu/fp_decode.h | get the extension word and test for brief or full extension type the 196 arch/m68k/math-emu/fp_decode.h | test if %pc is the base register for the indirect addr mode the 202 arch/m68k/math-emu/fp_decode.h | test if %pc is the base register for one of the extended modes the 405 arch/m68k/math-emu/fp_decode.h | get the absolute short address from user space the 411 arch/m68k/math-emu/fp_decode.h | get the absolute long address from user space the 21 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # addresses, and need to have the appropriate memory region set the 22 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # by the kernel the 29 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # Read the cavium mem control register the 31 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # Clear the lower 6 bits, the CVMSEG size the 34 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register the 35 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register the 40 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # First clear off CvmCtl[IPPCI] bit and move the performance the 67 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # Write the cavium control register the 82 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # OCTEON II or better have bit 15 set. Clear the error bits. the 91 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # Jump the master to kernel_entry the 98 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # All cores other than the master need to wait here for SMP bootstrap the 114 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # This is the variable where the next core to boot is stored the 116 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # Get the core id of the next to be booted the 121 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # Get my GP from the global variable the 124 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # Get my SP from the global variable the 127 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # Set the SP global variable to zero so the master knows we've started the 135 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h # Jump to the normal Linux SMP entry point the 71 arch/nds32/include/asm/nds32.h * We defined at the start of the physical memory */ the 112 arch/s390/include/asm/nospec-insn.h # the "br \reg" after the code has been patched. the 5 arch/x86/boot/code16gcc.h # This file is added to the assembler via -Wa when compiling 16-bit C code. the 161 drivers/gpu/drm/nouveau/dispnv04/arb.c * the overlay. */ the 147 drivers/mtd/nftlmount.c The new DiskOnChip driver scans the MediaHeader itself, and presents a virtual the 148 drivers/mtd/nftlmount.c erasesize based on UnitSizeFactor. So the erasesize we read from the mtd the 219 drivers/mtd/nftlmount.c The new DiskOnChip driver already scanned the bad block table. Just query it. the 1105 drivers/parisc/sba_iommu.c Tells where the dvi bits are located in the address. the 269 include/scsi/scsi_transport_fc.h is loop or the the 14 include/sound/wavefront.h it is necessary to pack the "wavefront_alias" structure to a size the 16 include/sound/wavefront.h the case on the original platform, MS-DOS). If this is not done, the 22 include/sound/wavefront.h still have the same (correct) size.