tgn10             720 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	struct optc *tgn10 =
tgn10             723 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	if (!tgn10)
tgn10             726 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	tgn10->base.inst = instance;
tgn10             727 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	tgn10->base.ctx = ctx;
tgn10             729 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	tgn10->tg_regs = &tg_regs[instance];
tgn10             730 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	tgn10->tg_shift = &tg_shift;
tgn10             731 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	tgn10->tg_mask = &tg_mask;
tgn10             733 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	dcn10_timing_generator_init(tgn10);
tgn10             735 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	return &tgn10->base;
tgn10            1122 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	struct optc *tgn10 =
tgn10            1125 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	if (!tgn10)
tgn10            1128 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	tgn10->base.inst = instance;
tgn10            1129 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	tgn10->base.ctx = ctx;
tgn10            1131 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	tgn10->tg_regs = &tg_regs[instance];
tgn10            1132 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	tgn10->tg_shift = &tg_shift;
tgn10            1133 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	tgn10->tg_mask = &tg_mask;
tgn10            1135 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	dcn20_timing_generator_init(tgn10);
tgn10            1137 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	return &tgn10->base;
tgn10            1212 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	struct optc *tgn10 =
tgn10            1215 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	if (!tgn10)
tgn10            1218 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	tgn10->base.inst = instance;
tgn10            1219 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	tgn10->base.ctx = ctx;
tgn10            1221 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	tgn10->tg_regs = &tg_regs[instance];
tgn10            1222 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	tgn10->tg_shift = &tg_shift;
tgn10            1223 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	tgn10->tg_mask = &tg_mask;
tgn10            1225 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	dcn20_timing_generator_init(tgn10);
tgn10            1227 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	return &tgn10->base;