texdw             761 drivers/gpu/drm/radeon/evergreen_cs.c 	u32 texdw[8];
texdw             764 drivers/gpu/drm/radeon/evergreen_cs.c 	texdw[0] = radeon_get_ib_value(p, idx + 0);
texdw             765 drivers/gpu/drm/radeon/evergreen_cs.c 	texdw[1] = radeon_get_ib_value(p, idx + 1);
texdw             766 drivers/gpu/drm/radeon/evergreen_cs.c 	texdw[2] = radeon_get_ib_value(p, idx + 2);
texdw             767 drivers/gpu/drm/radeon/evergreen_cs.c 	texdw[3] = radeon_get_ib_value(p, idx + 3);
texdw             768 drivers/gpu/drm/radeon/evergreen_cs.c 	texdw[4] = radeon_get_ib_value(p, idx + 4);
texdw             769 drivers/gpu/drm/radeon/evergreen_cs.c 	texdw[5] = radeon_get_ib_value(p, idx + 5);
texdw             770 drivers/gpu/drm/radeon/evergreen_cs.c 	texdw[6] = radeon_get_ib_value(p, idx + 6);
texdw             771 drivers/gpu/drm/radeon/evergreen_cs.c 	texdw[7] = radeon_get_ib_value(p, idx + 7);
texdw             772 drivers/gpu/drm/radeon/evergreen_cs.c 	dim = G_030000_DIM(texdw[0]);
texdw             773 drivers/gpu/drm/radeon/evergreen_cs.c 	llevel = G_030014_LAST_LEVEL(texdw[5]);
texdw             774 drivers/gpu/drm/radeon/evergreen_cs.c 	mslice = G_030014_LAST_ARRAY(texdw[5]) + 1;
texdw             775 drivers/gpu/drm/radeon/evergreen_cs.c 	width = G_030000_TEX_WIDTH(texdw[0]) + 1;
texdw             776 drivers/gpu/drm/radeon/evergreen_cs.c 	height =  G_030004_TEX_HEIGHT(texdw[1]) + 1;
texdw             777 drivers/gpu/drm/radeon/evergreen_cs.c 	depth = G_030004_TEX_DEPTH(texdw[1]) + 1;
texdw             778 drivers/gpu/drm/radeon/evergreen_cs.c 	surf.format = G_03001C_DATA_FORMAT(texdw[7]);
texdw             779 drivers/gpu/drm/radeon/evergreen_cs.c 	surf.nbx = (G_030000_PITCH(texdw[0]) + 1) * 8;
texdw             782 drivers/gpu/drm/radeon/evergreen_cs.c 	surf.mode = G_030004_ARRAY_MODE(texdw[1]);
texdw             783 drivers/gpu/drm/radeon/evergreen_cs.c 	surf.tsplit = G_030018_TILE_SPLIT(texdw[6]);
texdw             784 drivers/gpu/drm/radeon/evergreen_cs.c 	surf.nbanks = G_03001C_NUM_BANKS(texdw[7]);
texdw             785 drivers/gpu/drm/radeon/evergreen_cs.c 	surf.bankw = G_03001C_BANK_WIDTH(texdw[7]);
texdw             786 drivers/gpu/drm/radeon/evergreen_cs.c 	surf.bankh = G_03001C_BANK_HEIGHT(texdw[7]);
texdw             787 drivers/gpu/drm/radeon/evergreen_cs.c 	surf.mtilea = G_03001C_MACRO_TILE_ASPECT(texdw[7]);
texdw             789 drivers/gpu/drm/radeon/evergreen_cs.c 	toffset = texdw[2] << 8;
texdw             790 drivers/gpu/drm/radeon/evergreen_cs.c 	moffset = texdw[3] << 8;
texdw             831 drivers/gpu/drm/radeon/evergreen_cs.c 			 __func__, __LINE__, texdw[0], texdw[1], texdw[4],
texdw             832 drivers/gpu/drm/radeon/evergreen_cs.c 			 texdw[5], texdw[6], texdw[7]);
texdw             856 drivers/gpu/drm/radeon/evergreen_cs.c 			(unsigned long)texdw[2] << 8, mslice,
texdw             917 drivers/gpu/drm/radeon/evergreen_cs.c 					(unsigned long)texdw[3] << 8, moffset, mslice,