tex 119 drivers/gpu/drm/mga/mga_state.c drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; tex 124 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_TEXCTL2, tex->texctl2, tex 125 drivers/gpu/drm/mga/mga_state.c MGA_TEXCTL, tex->texctl, tex 126 drivers/gpu/drm/mga/mga_state.c MGA_TEXFILTER, tex->texfilter, tex 127 drivers/gpu/drm/mga/mga_state.c MGA_TEXBORDERCOL, tex->texbordercol); tex 129 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_TEXORG, tex->texorg, tex 130 drivers/gpu/drm/mga/mga_state.c MGA_TEXORG1, tex->texorg1, tex 131 drivers/gpu/drm/mga/mga_state.c MGA_TEXORG2, tex->texorg2, MGA_TEXORG3, tex->texorg3); tex 133 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_TEXORG4, tex->texorg4, tex 134 drivers/gpu/drm/mga/mga_state.c MGA_TEXWIDTH, tex->texwidth, tex 135 drivers/gpu/drm/mga/mga_state.c MGA_TEXHEIGHT, tex->texheight, MGA_WR24, tex->texwidth); tex 137 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_WR34, tex->texheight, tex 147 drivers/gpu/drm/mga/mga_state.c drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; tex 155 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC, tex 156 drivers/gpu/drm/mga/mga_state.c MGA_TEXCTL, tex->texctl, tex 157 drivers/gpu/drm/mga/mga_state.c MGA_TEXFILTER, tex->texfilter, tex 158 drivers/gpu/drm/mga/mga_state.c MGA_TEXBORDERCOL, tex->texbordercol); tex 160 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_TEXORG, tex->texorg, tex 161 drivers/gpu/drm/mga/mga_state.c MGA_TEXORG1, tex->texorg1, tex 162 drivers/gpu/drm/mga/mga_state.c MGA_TEXORG2, tex->texorg2, MGA_TEXORG3, tex->texorg3); tex 164 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_TEXORG4, tex->texorg4, tex 165 drivers/gpu/drm/mga/mga_state.c MGA_TEXWIDTH, tex->texwidth, tex 166 drivers/gpu/drm/mga/mga_state.c MGA_TEXHEIGHT, tex->texheight, MGA_WR49, 0x00000000); tex 173 drivers/gpu/drm/mga/mga_state.c MGA_WR54, tex->texwidth | MGA_G400_WR_MAGIC, tex 174 drivers/gpu/drm/mga/mga_state.c MGA_WR62, tex->texheight | MGA_G400_WR_MAGIC, tex 187 drivers/gpu/drm/mga/mga_state.c drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1]; tex 195 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_TEXCTL2, (tex->texctl2 | tex 198 drivers/gpu/drm/mga/mga_state.c MGA_TEXCTL, tex->texctl, tex 199 drivers/gpu/drm/mga/mga_state.c MGA_TEXFILTER, tex->texfilter, tex 200 drivers/gpu/drm/mga/mga_state.c MGA_TEXBORDERCOL, tex->texbordercol); tex 202 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_TEXORG, tex->texorg, tex 203 drivers/gpu/drm/mga/mga_state.c MGA_TEXORG1, tex->texorg1, tex 204 drivers/gpu/drm/mga/mga_state.c MGA_TEXORG2, tex->texorg2, MGA_TEXORG3, tex->texorg3); tex 206 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_TEXORG4, tex->texorg4, tex 207 drivers/gpu/drm/mga/mga_state.c MGA_TEXWIDTH, tex->texwidth, tex 208 drivers/gpu/drm/mga/mga_state.c MGA_TEXHEIGHT, tex->texheight, MGA_WR49, 0x00000000); tex 213 drivers/gpu/drm/mga/mga_state.c MGA_WR52, tex->texwidth | MGA_G400_WR_MAGIC); tex 215 drivers/gpu/drm/mga/mga_state.c DMA_BLOCK(MGA_WR60, tex->texheight | MGA_G400_WR_MAGIC, tex 218 drivers/gpu/drm/mga/mga_state.c MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC); tex 403 drivers/gpu/drm/mga/mga_state.c drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit]; tex 406 drivers/gpu/drm/mga/mga_state.c org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK); tex 409 drivers/gpu/drm/mga/mga_state.c DRM_ERROR("*** bad TEXORG: 0x%x, unit %d\n", tex->texorg, unit); tex 410 drivers/gpu/drm/mga/mga_state.c tex->texorg = 0; tex 184 drivers/gpu/drm/r128/r128_state.c drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0]; tex 193 drivers/gpu/drm/r128/r128_state.c OUT_RING(tex->tex_cntl); tex 194 drivers/gpu/drm/r128/r128_state.c OUT_RING(tex->tex_combine_cntl); tex 197 drivers/gpu/drm/r128/r128_state.c OUT_RING(tex->tex_offset[i]); tex 201 drivers/gpu/drm/r128/r128_state.c OUT_RING(tex->tex_border_color); tex 209 drivers/gpu/drm/r128/r128_state.c drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1]; tex 217 drivers/gpu/drm/r128/r128_state.c OUT_RING(tex->tex_cntl); tex 218 drivers/gpu/drm/r128/r128_state.c OUT_RING(tex->tex_combine_cntl); tex 220 drivers/gpu/drm/r128/r128_state.c OUT_RING(tex->tex_offset[i]); tex 223 drivers/gpu/drm/r128/r128_state.c OUT_RING(tex->tex_border_color); tex 566 drivers/gpu/drm/vc4/vc4_validate.c struct drm_gem_cma_object *tex; tex 583 drivers/gpu/drm/vc4/vc4_validate.c tex = vc4_use_bo(exec, texture_handle_index); tex 584 drivers/gpu/drm/vc4/vc4_validate.c if (!tex) tex 588 drivers/gpu/drm/vc4/vc4_validate.c uint32_t remaining_size = tex->base.size - p0; tex 590 drivers/gpu/drm/vc4/vc4_validate.c if (p0 > tex->base.size - 4) { tex 599 drivers/gpu/drm/vc4/vc4_validate.c *validated_p0 = tex->paddr + p0; tex 678 drivers/gpu/drm/vc4/vc4_validate.c if (!vc4_check_tex_size(exec, tex, offset + cube_map_stride * 5, tex 727 drivers/gpu/drm/vc4/vc4_validate.c *validated_p0 = tex->paddr + p0; tex 731 drivers/gpu/drm/vc4/vc4_validate.c to_vc4_bo(&tex->base)->write_seqno); tex 829 drivers/gpu/drm/vc4/vc4_validate.c uint32_t tex, uni; tex 856 drivers/gpu/drm/vc4/vc4_validate.c for (tex = 0; tex 857 drivers/gpu/drm/vc4/vc4_validate.c tex < validated_shader->num_texture_samples; tex 858 drivers/gpu/drm/vc4/vc4_validate.c tex++) { tex 861 drivers/gpu/drm/vc4/vc4_validate.c &validated_shader->texture_samples[tex], tex 862 drivers/gpu/drm/vc4/vc4_validate.c texture_handles_u[tex], tex 306 drivers/gpu/drm/via/via_verifier.c uint32_t *addr, *pitch, *height, tex; tex 316 drivers/gpu/drm/via/via_verifier.c &(cur_seq->t_addr[tex = cur_seq->texture][start]); tex 317 drivers/gpu/drm/via/via_verifier.c pitch = &(cur_seq->pitch[tex][start]); tex 318 drivers/gpu/drm/via/via_verifier.c height = &(cur_seq->height[tex][start]); tex 319 drivers/gpu/drm/via/via_verifier.c npot = cur_seq->tex_npot[tex]; tex 924 drivers/gpu/drm/vmwgfx/device_include/svga3d_dx.h } tex; /* 1d, 2d, 3d, cube */ tex 985 drivers/gpu/drm/vmwgfx/device_include/svga3d_dx.h } tex; /* 1d, 2d, cube */ tex 372 drivers/iommu/io-pgtable-arm-v7s.c arm_v7s_iopte tex = pte & ARM_V7S_CONT_PAGE_TEX_MASK; tex 374 drivers/iommu/io-pgtable-arm-v7s.c pte ^= xn | tex | ARM_V7S_PTE_TYPE_PAGE; tex 376 drivers/iommu/io-pgtable-arm-v7s.c (tex << ARM_V7S_CONT_PAGE_TEX_SHIFT) | tex 388 drivers/iommu/io-pgtable-arm-v7s.c arm_v7s_iopte tex = pte & (ARM_V7S_CONT_PAGE_TEX_MASK << tex 391 drivers/iommu/io-pgtable-arm-v7s.c pte ^= xn | tex | ARM_V7S_PTE_TYPE_CONT_PAGE; tex 393 drivers/iommu/io-pgtable-arm-v7s.c (tex >> ARM_V7S_CONT_PAGE_TEX_SHIFT) | tex 429 include/uapi/drm/radeon_drm.h drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS];