test_lane_count  1144 drivers/gpu/drm/i915/display/intel_display_types.h 	u8 test_lane_count;
test_lane_count  1917 drivers/gpu/drm/i915/display/intel_dp.c 					       intel_dp->compliance.test_lane_count)) {
test_lane_count  1924 drivers/gpu/drm/i915/display/intel_dp.c 				intel_dp->compliance.test_lane_count;
test_lane_count  4515 drivers/gpu/drm/i915/display/intel_dp.c 	u8 test_lane_count, test_link_bw;
test_lane_count  4521 drivers/gpu/drm/i915/display/intel_dp.c 				   &test_lane_count);
test_lane_count  4527 drivers/gpu/drm/i915/display/intel_dp.c 	test_lane_count &= DP_MAX_LANE_COUNT_MASK;
test_lane_count  4539 drivers/gpu/drm/i915/display/intel_dp.c 					test_lane_count))
test_lane_count  4542 drivers/gpu/drm/i915/display/intel_dp.c 	intel_dp->compliance.test_lane_count = test_lane_count;