tdep_count       1941 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		dte_data->tdep_count = 3;
tdep_count       2572 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u8 tdep_count;
tdep_count       2595 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	tdep_count = dte_data->tdep_count;
tdep_count       2596 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (tdep_count > SMC_SISLANDS_DTE_MAX_TEMPERATURE_DEPENDENT_ARRAY_SIZE)
tdep_count       2597 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		tdep_count = SMC_SISLANDS_DTE_MAX_TEMPERATURE_DEPENDENT_ARRAY_SIZE;
tdep_count       2607 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (tdep_count > 0)
tdep_count       2615 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	dte_tables->Tdep_count = tdep_count;
tdep_count       2617 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	for (i = 0; i < (u32)tdep_count; i++) {
tdep_count        897 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	u8 tdep_count;
tdep_count       1850 drivers/gpu/drm/radeon/si_dpm.c 		dte_data->tdep_count = 3;
tdep_count       2476 drivers/gpu/drm/radeon/si_dpm.c 	u8 tdep_count;
tdep_count       2499 drivers/gpu/drm/radeon/si_dpm.c 	tdep_count = dte_data->tdep_count;
tdep_count       2500 drivers/gpu/drm/radeon/si_dpm.c 	if (tdep_count > SMC_SISLANDS_DTE_MAX_TEMPERATURE_DEPENDENT_ARRAY_SIZE)
tdep_count       2501 drivers/gpu/drm/radeon/si_dpm.c 		tdep_count = SMC_SISLANDS_DTE_MAX_TEMPERATURE_DEPENDENT_ARRAY_SIZE;
tdep_count       2511 drivers/gpu/drm/radeon/si_dpm.c 	if (tdep_count > 0)
tdep_count       2519 drivers/gpu/drm/radeon/si_dpm.c 	dte_tables->Tdep_count = tdep_count;
tdep_count       2521 drivers/gpu/drm/radeon/si_dpm.c 	for (i = 0; i < (u32)tdep_count; i++) {
tdep_count         81 drivers/gpu/drm/radeon/si_dpm.h 	u8 tdep_count;