tcon_top 30 drivers/gpu/drm/sun4i/sun8i_tcon_top.c struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev); tcon_top 44 drivers/gpu/drm/sun4i/sun8i_tcon_top.c spin_lock_irqsave(&tcon_top->reg_lock, flags); tcon_top 46 drivers/gpu/drm/sun4i/sun8i_tcon_top.c val = readl(tcon_top->regs + TCON_TOP_GATE_SRC_REG); tcon_top 49 drivers/gpu/drm/sun4i/sun8i_tcon_top.c writel(val, tcon_top->regs + TCON_TOP_GATE_SRC_REG); tcon_top 51 drivers/gpu/drm/sun4i/sun8i_tcon_top.c spin_unlock_irqrestore(&tcon_top->reg_lock, flags); tcon_top 59 drivers/gpu/drm/sun4i/sun8i_tcon_top.c struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev); tcon_top 78 drivers/gpu/drm/sun4i/sun8i_tcon_top.c spin_lock_irqsave(&tcon_top->reg_lock, flags); tcon_top 80 drivers/gpu/drm/sun4i/sun8i_tcon_top.c reg = readl(tcon_top->regs + TCON_TOP_PORT_SEL_REG); tcon_top 88 drivers/gpu/drm/sun4i/sun8i_tcon_top.c writel(reg, tcon_top->regs + TCON_TOP_PORT_SEL_REG); tcon_top 90 drivers/gpu/drm/sun4i/sun8i_tcon_top.c spin_unlock_irqrestore(&tcon_top->reg_lock, flags); tcon_top 129 drivers/gpu/drm/sun4i/sun8i_tcon_top.c struct sun8i_tcon_top *tcon_top; tcon_top 137 drivers/gpu/drm/sun4i/sun8i_tcon_top.c tcon_top = devm_kzalloc(dev, sizeof(*tcon_top), GFP_KERNEL); tcon_top 138 drivers/gpu/drm/sun4i/sun8i_tcon_top.c if (!tcon_top) tcon_top 145 drivers/gpu/drm/sun4i/sun8i_tcon_top.c tcon_top->clk_data = clk_data; tcon_top 147 drivers/gpu/drm/sun4i/sun8i_tcon_top.c spin_lock_init(&tcon_top->reg_lock); tcon_top 149 drivers/gpu/drm/sun4i/sun8i_tcon_top.c tcon_top->rst = devm_reset_control_get(dev, NULL); tcon_top 150 drivers/gpu/drm/sun4i/sun8i_tcon_top.c if (IS_ERR(tcon_top->rst)) { tcon_top 152 drivers/gpu/drm/sun4i/sun8i_tcon_top.c return PTR_ERR(tcon_top->rst); tcon_top 155 drivers/gpu/drm/sun4i/sun8i_tcon_top.c tcon_top->bus = devm_clk_get(dev, "bus"); tcon_top 156 drivers/gpu/drm/sun4i/sun8i_tcon_top.c if (IS_ERR(tcon_top->bus)) { tcon_top 158 drivers/gpu/drm/sun4i/sun8i_tcon_top.c return PTR_ERR(tcon_top->bus); tcon_top 163 drivers/gpu/drm/sun4i/sun8i_tcon_top.c tcon_top->regs = regs; tcon_top 167 drivers/gpu/drm/sun4i/sun8i_tcon_top.c ret = reset_control_deassert(tcon_top->rst); tcon_top 173 drivers/gpu/drm/sun4i/sun8i_tcon_top.c ret = clk_prepare_enable(tcon_top->bus); tcon_top 196 drivers/gpu/drm/sun4i/sun8i_tcon_top.c &tcon_top->reg_lock, tcon_top 202 drivers/gpu/drm/sun4i/sun8i_tcon_top.c &tcon_top->reg_lock, tcon_top 208 drivers/gpu/drm/sun4i/sun8i_tcon_top.c &tcon_top->reg_lock, tcon_top 224 drivers/gpu/drm/sun4i/sun8i_tcon_top.c dev_set_drvdata(dev, tcon_top); tcon_top 232 drivers/gpu/drm/sun4i/sun8i_tcon_top.c clk_disable_unprepare(tcon_top->bus); tcon_top 234 drivers/gpu/drm/sun4i/sun8i_tcon_top.c reset_control_assert(tcon_top->rst); tcon_top 242 drivers/gpu/drm/sun4i/sun8i_tcon_top.c struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev); tcon_top 243 drivers/gpu/drm/sun4i/sun8i_tcon_top.c struct clk_hw_onecell_data *clk_data = tcon_top->clk_data; tcon_top 251 drivers/gpu/drm/sun4i/sun8i_tcon_top.c clk_disable_unprepare(tcon_top->bus); tcon_top 252 drivers/gpu/drm/sun4i/sun8i_tcon_top.c reset_control_assert(tcon_top->rst);