tbl_B             129 drivers/phy/qualcomm/phy-qcom-ufs-i.h 			struct ufs_qcom_phy_calibration *tbl_B, int tbl_size_B,
tbl_B              14 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c 	struct ufs_qcom_phy_calibration *tbl_A, *tbl_B;
tbl_B              35 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c 	tbl_B = phy_cal_table_rate_B;
tbl_B              38 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c 						tbl_B, tbl_size_B, is_rate_B);
tbl_B              19 drivers/phy/qualcomm/phy-qcom-ufs.c 			   struct ufs_qcom_phy_calibration *tbl_B,
tbl_B              42 drivers/phy/qualcomm/phy-qcom-ufs.c 		if (!tbl_B) {
tbl_B              50 drivers/phy/qualcomm/phy-qcom-ufs.c 			writel_relaxed(tbl_B[i].cfg_value,
tbl_B              51 drivers/phy/qualcomm/phy-qcom-ufs.c 				ufs_qcom_phy->mmio + tbl_B[i].reg_offset);