target_reg        100 drivers/gpu/drm/amd/amdgpu/soc15_common.h 		uint32_t target_reg = adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg;\
target_reg        106 drivers/gpu/drm/amd/amdgpu/soc15_common.h 			if (target_reg == grbm_cntl) \
target_reg        108 drivers/gpu/drm/amd/amdgpu/soc15_common.h 			else if (target_reg == grbm_idx) \
target_reg        110 drivers/gpu/drm/amd/amdgpu/soc15_common.h 			WREG32(target_reg, value);	\
target_reg        112 drivers/gpu/drm/amd/amdgpu/soc15_common.h 			WREG32(target_reg, value); \
target_reg        118 drivers/gpu/drm/amd/amdgpu/soc15_common.h 			uint32_t target_reg = adev->reg_offset[GC_HWIP][0][reg##_BASE_IDX] + reg;\
target_reg        119 drivers/gpu/drm/amd/amdgpu/soc15_common.h 			WREG32_RLC(target_reg, value); \
target_reg       3213 sound/pci/rme9652/hdspm.c 	u32 target_reg;
target_reg       3217 sound/pci/rme9652/hdspm.c 		target_reg = HDSPM_WR_SETTINGS;
target_reg       3220 sound/pci/rme9652/hdspm.c 		target_reg = HDSPM_controlRegister;
target_reg       3228 sound/pci/rme9652/hdspm.c 	hdspm_write(hdspm, target_reg, *reg);
target_reg        113 tools/perf/util/bpf-prologue.c 		     const char *reg, int target_reg)
target_reg        122 tools/perf/util/bpf-prologue.c 	ins(BPF_LDX_MEM(BPF_DW, target_reg, ctx_reg, offset), pos);