target_min 464 drivers/gpu/drm/i915/display/intel_panel.c u32 target_min, u32 target_max) target_min 469 drivers/gpu/drm/i915/display/intel_panel.c WARN_ON(target_min > target_max); target_min 476 drivers/gpu/drm/i915/display/intel_panel.c target_max - target_min); target_min 478 drivers/gpu/drm/i915/display/intel_panel.c target_val += target_min; target_min 352 drivers/gpu/drm/sti/sti_dvo.c int target_min = target - CLK_TOLERANCE_HZ; target_min 364 drivers/gpu/drm/sti/sti_dvo.c if ((result < target_min) || (result > target_max)) { target_min 607 drivers/gpu/drm/sti/sti_hda.c int target_min = target - CLK_TOLERANCE_HZ; target_min 623 drivers/gpu/drm/sti/sti_hda.c if ((result < target_min) || (result > target_max)) { target_min 1003 drivers/gpu/drm/sti/sti_hdmi.c int target_min = target - CLK_TOLERANCE_HZ; target_min 1016 drivers/gpu/drm/sti/sti_hdmi.c if ((result < target_min) || (result > target_max)) { target_min 475 drivers/gpu/drm/stm/ltdc.c int target_min = target - CLK_TOLERANCE_HZ; target_min 502 drivers/gpu/drm/stm/ltdc.c if (result < target_min || result > target_max) target_min 1118 drivers/regulator/core.c int target_min, target_max; target_min 1144 drivers/regulator/core.c target_min = current_uV; target_min 1148 drivers/regulator/core.c target_min = rdev->constraints->min_uV; target_min 1153 drivers/regulator/core.c target_min = rdev->constraints->max_uV; target_min 1157 drivers/regulator/core.c if (target_min != current_uV || target_max != current_uV) { target_min 1159 drivers/regulator/core.c current_uV, target_min, target_max); target_min 1161 drivers/regulator/core.c rdev, target_min, target_max); target_min 1165 drivers/regulator/core.c target_min, target_max, ret); target_min 137 include/net/red.h u32 target_min; /* min_th + 0.4*(max_th - min_th) */ target_min 210 include/net/red.h p->target_min = qth_min + 2*delta; target_min 411 include/net/red.h else if (qavg < p->target_min && p->max_P >= MAX_P_MIN)