table_clk_vlt     138 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	struct phm_clock_voltage_dependency_table *table_clk_vlt;
table_clk_vlt     140 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt = kzalloc(struct_size(table_clk_vlt, entries, 7),
table_clk_vlt     143 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	if (NULL == table_clk_vlt) {
table_clk_vlt     148 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->count = 8;
table_clk_vlt     149 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_0;
table_clk_vlt     150 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[0].v = 0;
table_clk_vlt     151 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_1;
table_clk_vlt     152 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[1].v = 1;
table_clk_vlt     153 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[2].clk = PP_DAL_POWERLEVEL_2;
table_clk_vlt     154 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[2].v = 2;
table_clk_vlt     155 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[3].clk = PP_DAL_POWERLEVEL_3;
table_clk_vlt     156 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[3].v = 3;
table_clk_vlt     157 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[4].clk = PP_DAL_POWERLEVEL_4;
table_clk_vlt     158 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[4].v = 4;
table_clk_vlt     159 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[5].clk = PP_DAL_POWERLEVEL_5;
table_clk_vlt     160 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[5].v = 5;
table_clk_vlt     161 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[6].clk = PP_DAL_POWERLEVEL_6;
table_clk_vlt     162 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[6].v = 6;
table_clk_vlt     163 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[7].clk = PP_DAL_POWERLEVEL_7;
table_clk_vlt     164 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	table_clk_vlt->entries[7].v = 7;
table_clk_vlt     165 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	hwmgr->dyn_state.vddc_dep_on_dal_pwrl = table_clk_vlt;
table_clk_vlt     275 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	struct phm_clock_voltage_dependency_table *table_clk_vlt;
table_clk_vlt     277 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt = kzalloc(struct_size(table_clk_vlt, entries, 7),
table_clk_vlt     280 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	if (NULL == table_clk_vlt) {
table_clk_vlt     285 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->count = 8;
table_clk_vlt     286 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_0;
table_clk_vlt     287 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[0].v = 0;
table_clk_vlt     288 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_1;
table_clk_vlt     289 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[1].v = 1;
table_clk_vlt     290 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[2].clk = PP_DAL_POWERLEVEL_2;
table_clk_vlt     291 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[2].v = 2;
table_clk_vlt     292 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[3].clk = PP_DAL_POWERLEVEL_3;
table_clk_vlt     293 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[3].v = 3;
table_clk_vlt     294 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[4].clk = PP_DAL_POWERLEVEL_4;
table_clk_vlt     295 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[4].v = 4;
table_clk_vlt     296 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[5].clk = PP_DAL_POWERLEVEL_5;
table_clk_vlt     297 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[5].v = 5;
table_clk_vlt     298 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[6].clk = PP_DAL_POWERLEVEL_6;
table_clk_vlt     299 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[6].v = 6;
table_clk_vlt     300 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[7].clk = PP_DAL_POWERLEVEL_7;
table_clk_vlt     301 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	table_clk_vlt->entries[7].v = 7;
table_clk_vlt     302 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	hwmgr->dyn_state.vddc_dep_on_dal_pwrl = table_clk_vlt;
table_clk_vlt     495 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	struct phm_clock_voltage_dependency_table *table_clk_vlt;
table_clk_vlt     500 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	table_clk_vlt = kzalloc(table_size, GFP_KERNEL);
table_clk_vlt     502 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	if (NULL == table_clk_vlt) {
table_clk_vlt     506 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table_clk_vlt->count = 4;
table_clk_vlt     507 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_ULTRALOW;
table_clk_vlt     508 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table_clk_vlt->entries[0].v = 0;
table_clk_vlt     509 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_LOW;
table_clk_vlt     510 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table_clk_vlt->entries[1].v = 720;
table_clk_vlt     511 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table_clk_vlt->entries[2].clk = PP_DAL_POWERLEVEL_NOMINAL;
table_clk_vlt     512 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table_clk_vlt->entries[2].v = 810;
table_clk_vlt     513 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table_clk_vlt->entries[3].clk = PP_DAL_POWERLEVEL_PERFORMANCE;
table_clk_vlt     514 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table_clk_vlt->entries[3].v = 900;
table_clk_vlt     516 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 			pptable_info->vddc_dep_on_dal_pwrl = table_clk_vlt;
table_clk_vlt     517 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		hwmgr->dyn_state.vddc_dep_on_dal_pwrl = table_clk_vlt;