t_urg_wm_us       474 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	dlg_sys_param.t_urg_wm_us = v->urgent_watermark;
t_urg_wm_us      1579 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	dlg_sys_param.t_urg_wm_us = get_wm_urgent(mode_lib, e2e_pipe_param, num_pipes);
t_urg_wm_us      1579 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	dlg_sys_param.t_urg_wm_us = get_wm_urgent(mode_lib, e2e_pipe_param, num_pipes);
t_urg_wm_us      1680 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	dlg_sys_param.t_urg_wm_us = get_wm_urgent(mode_lib, e2e_pipe_param, num_pipes);
t_urg_wm_us       506 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	double t_urg_wm_us;
t_urg_wm_us       141 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 	dml_print("DML_RQ_DLG_CALC:    t_urg_wm_us          = %3.2f\n", dlg_sys_param.t_urg_wm_us);
t_urg_wm_us      1147 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	min_ttu_vblank = dlg_sys_param.t_urg_wm_us;