SocUlvPhaseSheddingMask 1724 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      SocUlvPhaseSheddingMask; // set this to 1 to set PSI0/1 to 1 in ULV mode
SocUlvPhaseSheddingMask  135 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c 	ppsmc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table.soculvphasesheddingmask;
SocUlvPhaseSheddingMask  561 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c 	pr_info("SocUlvPhaseSheddingMask = 0x%x\n", pptable->SocUlvPhaseSheddingMask);
SocUlvPhaseSheddingMask  736 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c 	ppsmc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->soculvphasesheddingmask;
SocUlvPhaseSheddingMask  548 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      SocUlvPhaseSheddingMask;
SocUlvPhaseSheddingMask  740 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      SocUlvPhaseSheddingMask; // set this to 1 to set PSI0/1 to 1 in ULV mode
SocUlvPhaseSheddingMask  446 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      SocUlvPhaseSheddingMask;
SocUlvPhaseSheddingMask  424 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 	smc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->SocUlvPhaseSheddingMask;
SocUlvPhaseSheddingMask  496 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	smc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->soculvphasesheddingmask;