tCCS_min          833 drivers/mtd/nand/raw/denali.c 	we_2_re = DIV_ROUND_UP(max(timings->tCCS_min, timings->tWHR_min), t_x);
tCCS_min         2356 drivers/mtd/nand/raw/marvell_nand.c 	nfc_tmg.tWHR = TO_CYCLES(max_t(int, sdr->tWHR_min, sdr->tCCS_min),
tCCS_min         2358 drivers/mtd/nand/raw/marvell_nand.c 	nfc_tmg.tRHW = TO_CYCLES(max_t(int, sdr->tRHW_min, sdr->tCCS_min),
tCCS_min         1218 drivers/mtd/nand/raw/nand_base.c 				    PSEC_TO_NSEC(sdr->tCCS_min)),
tCCS_min         1522 drivers/mtd/nand/raw/nand_base.c 			NAND_OP_ADDR(2, addrs, PSEC_TO_NSEC(sdr->tCCS_min)),
tCCS_min          369 drivers/mtd/nand/raw/nand_legacy.c 		ndelay(chip->data_interface.timings.sdr.tCCS_min / 1000);
tCCS_min           20 drivers/mtd/nand/raw/nand_timings.c 			.tCCS_min = 500000,
tCCS_min           62 drivers/mtd/nand/raw/nand_timings.c 			.tCCS_min = 500000,
tCCS_min          104 drivers/mtd/nand/raw/nand_timings.c 			.tCCS_min = 500000,
tCCS_min          146 drivers/mtd/nand/raw/nand_timings.c 			.tCCS_min = 500000,
tCCS_min          188 drivers/mtd/nand/raw/nand_timings.c 			.tCCS_min = 500000,
tCCS_min          230 drivers/mtd/nand/raw/nand_timings.c 			.tCCS_min = 500000,
tCCS_min          304 drivers/mtd/nand/raw/nand_timings.c 		timings->tCCS_min = 1000UL * onfi->tCCS;
tCCS_min          320 drivers/mtd/nand/raw/nand_timings.c 		timings->tCCS_min = 1000UL * 500000;
tCCS_min          444 include/linux/mtd/rawnand.h 	u32 tCCS_min;